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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ES9218PC датащи(PDF) 77 Page - ESS Technology,Inc |
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ES9218PC датащи(HTML) 77 Page - ESS Technology,Inc |
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77 / 101 page  ES9218P Datasheet CONFIDENTIAL ADVANCE INFORMATION 1.8 December 6, 2018 77 ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801 Register 49-51: Automatic Clock Gearing Thresholds (0x31 – 0x33) Bits [23:12] [11:0] Mnemonic clk_gear_max_thresh clk_gear_min_thresh Default 12’d220 12’d98 Bit Mnemonic Description [23:12] clk_gear_max_thresh Selects the maximum number of CLK/2 pulses per 1fs that must be counted before the clock gear is automatically increased (CLK is slowed down). [11:0] clk_gear_min_thresh Selects the minimum number of CLK/2 pulses per 1fs that must be counted before the clock gear is automatically decreased (CLK is sped up). This value should always be 98 or larger so that the minimum CLK oversampling factor is achieved. Note: The Automatic Clock Gearing Thresholds registers must be written from LSB to MSB in their e ntirety to be latched correctly. |
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