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ES9218PC датащи(PDF) 60 Page - ESS Technology,Inc

номер детали ES9218PC
подробное описание детали  32-bit Stereo Low Power DAC with Headphone Amplifier, Analog Volume Control, and Output Switch
PDF  101 Pages
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производитель  ESS [ESS Technology,Inc]
домашняя страница  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9218PC датащи(HTML) 60 Page - ESS Technology,Inc

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ES9218P Datasheet
December 6, 2018
CONFIDENTIAL ADVANCE INFORMATION 1.8
ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801
60
Register 26: Charge Pump Soft Start Delay (0x1A)
Bits
[7:0]
Mnemonic
cp_ss_delay
Default
8’d98
Bit
Mnemonic
Description
[7:0]
cp_ss_delay
Configures the delay between the weak charge pump enable and the strong charge pump enable. This
delay is to limit the inrush currents of the strong charge pump when powering up.
This relationship is not exact because chargepump clock frequency is not guaranteed to be exactly equal
to XI(MCLK). It is automatically adjusted to undo the effects of clock gearing. The result is that the
chargepump clock rate remains constant with respect to XI(MCLK) even when CLK changes but only to
within the truncation error of the chargepump clock divider.
delay(s) ≈
256 ∗ cp_ss_delay
fMCLK
Example: For the default register setting if XI(MCLK) = 25MHz, delay ≈ 1ms.
See System Clock XI(MCLK) for the relationship between XI(MCLK) and CLK.



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