L9945 datasheet(121/151 Pages) STMICROELECTRONICS

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Table 34. Charge pump undervoltage detection electrical characteristics

Symbol

Parameter

Test condition

Min.

Max.

Unit

VCP_UV

Under voltage threshold

Referenced to VVPS

VVPS + 3.9

VVPS + 5.1

VhCP_UV

Under voltage hysteresis

Referenced to VVPS

250

tCP_UV

Digital filter of UV shutdown

µs

6.1.6

SPI enable bit

Each channel can be enabled/disabled independently by programming the en_OUT_xx SPI bit. If such bit is set

low, the corresponding channel is three-stated. By default, all channels are three-stated and must be enabled

setting en_OUT_xx high after having properly configured them in the same SPI register. Output control signal is

ignored as long as en_OUT_xx is low.

6.1.7

Protection disable bit

L9945 offers additional SPI bit for disabling channels via SPI: prot_disable_xx. Although such bit can disable

each channel separately, the main purpose of prot_disable_xx is to allow a fast disabling of all channels through a

single SPI frame. In fact, all prot_disable_xx bit are part of the same SPI command. In case prot_disable_xx is set

high, the corresponding channel is actively turned off. Output control signal is ignored as long as prot_disable_xx

is low.

6.1.8

EN6 input

Channel 6 is designed for being used in safety relevant applications. For such reason, an additional enable input,

EN6, has been provided. If EN6 is set low, channel 6 is actively turned off and the EN6_LATCH is set high

(cleared on SPI readout). Channel 6 control signal is ignored as long as EN6 is low.

6.1.9

NRES assertion

In case of NRES assertion, all outputs are actively turned off and the NRES_LATCH is set (cleared on SPI

readout). Since channel configuration is reset, output re-engagement must be executed manually.

6.1.10

Communication Check (CC)

Communication Check (CC) starts to work as soon as the disable inputs NDIS/DIS are released. With this

condition the CC timer is started. Depending on the status of NDIS/DIS at the release of NRES, two possible

scenarios can occur:

•

NDIS/DIS are released after NRES release, once the external microcontroller power-up routine is

completed. In this case, CC starts with tCC time frame (see Figure 26)

•

NDIS/DIS are released before NRES release. In this case, once NRES is deasserted, CC starts with tCC_INIT

time frame, in order to allow the external microcontroller completing the power-up routine. Then, it switches

to tCC (see Figure 27)

Figure 26. NDIS/DIS release after NRES release: tCC is selected as watchdog starting timer value

typ 66ms

NRES

DIS

NDIS

CC function

CC timing

disabled

enabled

55...80ms

GAPG0102161044CFT

L9945

Disable sources

DS12275 - Rev 8

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