 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
STA350B датащи(PDF) 85 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STA350B датащи(HTML) 85 Page - STMicroelectronics |
|
|
85 / 94 page  DocID018572 Rev 7 85/94 STA350B, STA350BW Register description 94 8.24.4 Channel PWM enable (CPWMEN) bit (address 0x4B, bit D2) This bit, when set, activates a mute output in case the volume will reach a value lower than -76 dBFS. 8.24.5 Power-down delay selector (PNDLSL[2:0]) bits (address 0x4C, bit D4, D3, D2) As per Section 8.24.3, the assertion of PWDN activates a counter that, by default, after 13 million clock cycles puts the power bridge in tri-state mode, independently from the fadeout time. Using these registers it is possible to program this counter according to the following table: PNDLSL[2] PNDLSL[1] PNDLSL[2] Fade out time 0 0 0 Default time (13 M clock cycles) 0 0 1 Default time divided by 2 0 1 0 Default time divided by 4 0 1 1 Default time divided by 8 1 0 0 Default time divided by 16 1 0 1 Default time divided by 32 1 1 0 Default time divided by 64 1 1 1 Default time divided by 128 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
