L99ASC03G datasheet(34/70 Pages) STMICROELECTRONICS

34 / 70 page

Electrical specifications

L99ASC03G

34/70

DocID029080 Rev 2

Table 13. Power-on RESET (VSREG)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VPORSREG,rising

Threshold (VSREG increasing)

All outputs open

4.5

VPORSREG,falling

Threshold (VSREG decreasing)

All outputs open

VPORSREG,hyst

Hysteresis

All outputs open

0.3

Table 14. Voltage regulator VDD

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VDD

Output voltage

Iload = 0mA to 200mA

6V <Vs < 18 V

-40°C < Tj < 150°C

4.865

5.0

5.1

tSST(1)

Startup settling time from VDD

standby to Active mode (no

NRES)

20 µA to 50 mA;

VDD ±2%; CEXT =47 µF;

dI/dt = 50 mA/µs

250

µs

20 µA to 100 mA;

VDD ± 2.5%; CEXT =47µF;

dI/dt = 100 mA/µs

130

µs

VDP

Drop-out Voltage

ILOAD =50 mA; VSREG =4.5 V

0.2

0.4

ILOAD = 100 mA; VSREG =4.5 V

0.3

0.5

IDD

Output current in active mode Max. continuous load current

200

IDDinrush(1)

Inrush current capability

VSREG > 6 V; VDD >VRT2;

CEXT  4.7 µF

200

IDDpeak

Peak output current

VSREG >6V; VDD >VRT2

300

IDDshort

Short circuit output current

Current limitation

300

600

950

tTSD

VDD deactivation time after

thermal shutdown

0.8

1.0

1.5

ICMPRISE

Current comparator rising

threshold

Rising current

3.6

4.6

ICMPFALL

Current comparator falling

threshold

Falling current

2.0

3.4

ICMPH

Current comparator hysteresis

0.2

VDDFAIL

VDD fail threshold

VDD short to ground during

startup

1.8

2.2

tVDDFAIL

VDD short to ground detection

time

VDD short to ground during

startup

3.4

4.0

7.0

dVDD/dt

dVDD/dt at regulator turn-on

CCER = 680 nF; CELE =47 µF;

I(VDD) = 10 mA. Slope from

0.5 V to 1 V and slope from 1 V

to 0.9 * VDD.

If current limitation is reached,

the slope is controlled by the

current limitation and output

capacitor.

330

V/ms

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