L9374LF datasheet(33/80 Pages) STMICROELECTRONICS

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L9374LF

Circuit description

The set point controller receives the following input information:



Synchronization-signal (SYNC_SIG)



Frequency of the PWM-generator (f_A; duty 50 %)



Set Point 1 (Duty cycle/current 1)

= w(n)(9 bits)



Set Point 2 (Duty cycle/current 2)

= w(n+1)(9 bits)



Duration (duration of Duty cycle/current 1) = t(n)(5 bits)

The Duty cycle/current set point value is the only output signal.

The timer commands the change between w(n) and w(n+1) to the Duty cycle/current set

point according to the programmed timing value t(n). The counter in the timing box is

controlled by f_A and bit D9 of address 0 (see Table 33.). If the value of the counter is lower

than t(n) the Duty Cycle/current set point is set to w(n). If the value is equal or higher the

Duty Cycle/current set point is set to w(n+1).

Note that the RESET_VALUE MSB (bit 9 of address 0) affects the timer duration. With the

MSB set the timer values double. This means if the SPI cycle time is equal or higher than 8

ms (>100(H)) the resolution of the duration t(n) is 500 μs per LSB instead of 250 μs.

Table 33. Timer t(n) resolution versus RESET_VALUE MSB

The timer counter is reset by the SYNC_SIG.

All buffers and the timer counter are reset by:



A CLKIN failure detection (CLKIN_F = ‘1’)



A re-synchronization command (SYNC_TRIG = ‘1’)

The value range (externally programmed):



w(n):

9 Bit



w(n+1): 9 Bit



t(n):

5 Bit

Example of set-point control

Below is an example of programming two sets of Set-Points sequentially. After programming

the parameters that govern the synchronization (RESET_VALUE, SYNC_VALUE and the

Table 32. Example of PWM duration timing, t(n)

Duration value (5 Bit)

Add. 0, bit D9

on-time (ms)

00000(2)

0 ms (off)

11111(2)

7.75 ms

01101(2)

3.25 ms

11111(2)

15.5 ms

01101(2)

6.5 ms

RESET_VALUE (add.0, bit D9)

RESET_VALUE duration

Resolution of timer duration

<8ms

250 μs

>8ms

500 μs

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