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L3751 датащи(PDF) 4 Page - STMicroelectronics |
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L3751 датащи(HTML) 4 Page - STMicroelectronics |
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4 / 41 page ![]() QFN Pin Die PAD Name Function 7 SYNCOUT Synchronization output implements 180° phase shifted referred to HO driving signal if the regulator is master. If synchronized to an external clock the signal is in phase with SYNCIN. 8 SYNCIN Synchronization input and DEM (Diode Emulation) / FPWM (Forced PWM) selection. The device always implements DEM during soft-start to support pre-charged output capacitor at device startup. Low logic level selects DEM, high logic level or synchronization clock input enables the forced PWM. The device features a smooth transition DEM to FPWM thanks to embedded dedicated circuitry. 9 NC Not internally connected 10 PGOOD Power Good output collector is driven in low impedance when the FB voltage is out of the regulation window. 11 ILIM Valley current limit adjust and current sense comparator input. A series resistor programs valley current threshold for accurate sensing across external sensing resistor or lossless sensing directly on the drain of the low-side MOSFET. 12 PGND Power ground 13 LO Low-side MOSFET gate drive output. Optional series resistor may be connected to adjust switching times for EMI compatibility. 14 VCC Output of the internal 7.5 V linear regulator that powers the embedded voltage gate driver. Connect high quality mlcc capacitor (470 nF≤ CVCC ≤ 2 µF) to power ground. 15 EP Pin internally connected to exposed pad and electrically isolated. Connect to PGND plane. 16 NC Not internally connected 17 BST Bootstrap supply for the high-side gate driver. Connect an external diode between VCC and BOOT and capacitor (100 nF typ.) between BOOT and SW pins. 18 HO High-side MOSFET gate drive output. Optional series resistor may be connected to adjust switching times for EMI compatibility. 19 SW Switching node to be connected to the source of the HS MOSFET, drain of the LS MOSFET and bootstrap capacitor terminal. 20 VIN Voltage input for the internal circuitry and VCC linear regulator. E.P. EP Exposed Pad. Connect to PGND plane. L3751 Pin configuration DS13841 - Rev 1 page 4/41 |
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