поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

WM8786GEDS/V датащи(PDF) 17 Page - Wolfson Microelectronics plc

номер детали WM8786GEDS/V
подробное описание детали  24-Bit, 192kHz Stereo ADC
PDF  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8786GEDS/V датащи(HTML) 17 Page - Wolfson Microelectronics plc

Back Button WM8786GEDS/V Datasheet HTML 13Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 14Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 15Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 16Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 17Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 18Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 19Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 20Page - Wolfson Microelectronics plc WM8786GEDS/V Datasheet HTML 21Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 22 page
background image
Pre-Production
WM8786
w
PP Rev 3.0 December 2005
17
In I
2S mode, the MSB is available on the second rising edge of BCLK following an LRCLK transition.
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.
Figure 18 I
2S Justified Audio Interface (assuming n-bit word length)
In DSP/PCM mode, the left channel MSB is available on the 2
nd rising edge of BCLK following a
rising edge of LRC. Right channel data immediately follows left channel data. Depending on word
length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of the
right channel data and the next sample.
In device master mode, the LRC output will resemble the frame pulse shown in Figure 19. In device
slave mode, Figure 20 it is possible to use any length of frame pulse less than 1/fs, providing the
falling edge of the frame pulse occurs greater than one BCLK period before the rising edge of the
next frame pulse.
Figure 19 DSP/PCM Mode Audio Interface (mode A, Master)
Figure 20 DSP/PCM Mode Audio Interface (mode A, Slave)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com