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CC2430-RTR1-F64Z датащи(PDF) 220 Page - Texas Instruments |
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CC2430-RTR1-F64Z датащи(HTML) 220 Page - Texas Instruments |
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220 / 234 page ![]() CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 220 of 232 Bit Name Reset R/W Description 7:0 RXFIFOCNT[7:0] 0x00 R Number of bytes in the RX FIFO Table 97: Register RXFIFOCNT (0xDF53) Bit Name Reset R/W Description 7:6 - 00 R0 Reserved, read as 0. 5 ABORTRX_ON_SRXON 1 R/W Abort RX when SRXON strobe is issued 0 : Packet reception is not aborted when SRXON is issued 1 : Packet reception is aborted when SRXON is issued 4 RX_INTERRUPTED 0 R RX interrupted by strobe command This bit is cleared when the next strobe is detected. 0 : Strobe command detected 1 : Packet reception was interrupted by strobe command 3 AUTO_TX2RX_OFF 0 R/W Automatically go to RX after TX. Applies to both data packets and ACK packets. 0 : Automatic RX after TX 1 : No automatic RX after TX 2 RX2RX_TIME_OFF 0 R/W Turns off the 12 symbol timeout after packet reception has ended. Active high. 1 PENDING_OR 0 R/W This bit is OR’ed with the pending bit from FFCTRL before it goes to the modulator. 0 ACCEPT_ACKPKT. 1 R/W Accept ACK packet control. 0 : Reject all ACK packets 1 : ACK packets are received Table 98: Register FSMTC1 (0xDF54) Bit Name Reset R/W Description 7:0 VERSION[7:0] 0x01 R Chip revision number Table 99: Register CHVER (0xDF60) Bit Name Reset R/W Description 7:0 CHIPID[7:0] 0x85 R Chip identification number. Always read as 0x85. Table 100: Register CHIPID (0xDF61) |
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