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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LMK6C датащи(PDF) 9 Page - Texas Instruments |
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LMK6C датащи(HTML) 9 Page - Texas Instruments |
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9 / 45 page  Over Recommended Operating Conditions PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IIL Input Low Current EN = GND –40 µA IIH Input High Current EN = VDD 40 µA CIN Input Capacitance 2 pF LVPECL, LVDS, and HCSL Frequency Tolerance FT Total Frequency Stability Inclusive of: solder shift, initial tolerance, variation over -40 ℃ to 85℃, variation over rated supply voltage range, and 10 year aging at 25 ℃. ±25 ppm LVCMOS Frequency Tolerance FT Total Frequency Stability Inclusive of: solder shift, initial tolerance, variation over -40 ℃ to 105℃, variation over rated supply voltage range, and 10 year aging at 25 ℃. ±25 ppm Power-On Characteristics tSTART_UP Start-up Time Time elapsed from 0.95 x VDD until output is enabled and output is within specification 5 ms tOE-EN Output Enable Time Time elapsed from OE = VIH until output is enabled and output is within specification, Fout > 10 MHz 25 µs tOE-DIS Output Disable Time Time elapsed from OE = VIL until output is disabled, Fout > 10 MHz 25 µs LVPECL - Clock Output Jitter RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout > 100 MHz 125 fs RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout = 100 MHz 110 TBD fs RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout = 125 MHz 95 125 fs RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout = 156.25 MHz 90 125 fs RJITT,RMS RMS Period Jitter Fout ≥ 25 MHz 0.7 ps RJITT,PK Peak-peak Period Jitter Fout ≥ 25 MHz 7 ps LVDS - Clock Output Jitter RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout > 100 MHz 125 fs RJ RMS Phase Jitter, BW: 12 kHz - 20 MHz Fout = 100 MHz 115 TBD fs RJ RMS Phase Jitter, BW: 12 kHz - 20 MHz Fout = 125 MHz 100 125 fs RJ RMS Phase Jitter, BW: 12 kHz - 20 MHz Fout = 156.25 MHz 95 125 fs RJITT,RMS RMS Period Jitter Fout ≥ 25 MHz 0.7 ps RJITT,PK Peak-peak Period Jitter Fout ≥ 25 MHz 7 ps HCSL - Clock Output Jitter RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout > 100 MHz 125 fs RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout = 100 MHz 110 TBD fs RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout = 125 MHz 95 125 fs RJ RMS Phase Jitter, Integration BW: 12 kHz - 20 MHz Fout = 156.25 MHz 90 125 fs JPCIe1-cc PCIe Gen 1 Common Clock jitter (jitter limit = 86 ps) Fout = 100 MHz TBD ps www.ti.com LMK6C SNAS826A – APRIL 2022 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: LMK6C |
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