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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LMK6C датащи(PDF) 8 Page - Texas Instruments |
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LMK6C датащи(HTML) 8 Page - Texas Instruments |
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8 / 45 page  Over Recommended Operating Conditions PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tR/tF Output Rise/Fall Time 20% to 80% of VOD,DIFF 120 200 ps ODC Output Duty Cycle 45 50 55 % PN-Floor Output Phase Noise Floor (fOFFSET > 10 MHz) Fout = 156.25 MHz –158 dBc/Hz LVDS Output Characteristics Fout Output Frequency 1 400 MHz VOD Output Voltage Swing (VOH - VOL) Under LVDS Load condition 250 350 450 mV VOD,DIFF Differential Output peak-peak swing 2x|VOD| V VOS Output Common Mode Voltage VDD = 2.5V/3.3 V 1.025 1.2 1.375 V VOS Output Common Mode Voltage VDD = 1.8 V 0.80 0.9 1.0 V tR/tF Output Rise/Fall Time 20% to 80% of VOD,DIFF 150 250 ps ODC Output Duty Cycle 45 50 55 % PN-Floor Output Phase Noise Floor (fOFFSET > 10 MHz) Fout = 156.25 MHz –158 dBc/Hz HCSL Output Characteristics Fout Output Frequency 1 400 MHz VOL Output Low Voltage VDD = 3.3V -150 0 150 mV VOH Output High Voltage VDD = 3.3V 660 750 850 mV VOL-ABS Absolute Low Voltage Including Undershoot VDD = 3.3V -300 mV VOH-ABS Absolute High Voltage Including Overshoot VDD = 3.3V 1.15 V Vcross Absolute Crossing Point Voltage VDD = 3.3V, fout = 100 MHz 250 550 mV ΔVcross Absolute Crossing Point Voltage VDD = 3.3V, fout = 100 MHz 140 mV dV/dt Out Slew Rate ± 150 mV around center point 2 4 V/ns ΔdV/dt Out Slew Rate 20 % ODC Output Duty Cycle 45 50 55 % PN-Floor Output Phase Noise Floor (fOFFSET > 10 MHz) Fout = 156.25 MHz –158 dBc/Hz LVCMOS Output Characteristics Fout Output Frequency 1 200 MHz VOL Output Low Voltage IOL = 3.6mA, VDD = 1.8V 0.36 V VOL Output Low Voltage IOL = 5.0mA, VDD = 2.5V 0.5 V IOL = 6.6mA, VDD = 3.3V 0.66 V VOH Output High Voltage IOH = 3.6mA, VDD = 1.8V 1.44 V VOH Output High Voltage IOH = 5.0mA, VDD = 2.5V 2 V IOH = 6.6mA, VDD = 3.3V 2.64 V tR/tF Output Rise/Fall Time 20% to 80% of VOH-VOL, CL = 2 pF 0.5 1 ns ODC Output Duty Cycle 45 50 55 % PN-Floor Output Phase Noise Floor (fOFFSET > 10 MHz) Fout = 50 MHz –155 dBc/Hz Rout Output Impedance 40 50 60 Ω CL Maximum capacitive load Fout > 50 MHz 15 pF CL Maximum capacitive load Fout < 50 MHz 30 pF EN Input Characteristics VIL Input Low Voltage 0.6 V VIH Input High Voltage 1.3 V LMK6C SNAS826A – APRIL 2022 – REVISED JULY 2022 www.ti.com 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LMK6C |
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