| поискавой системы для электроныых деталей |
|
TPS38 датащи(PDF) 10 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TPS38 датащи(HTML) 10 Page - Texas Instruments |
|
10 / 53 page ![]() 7.7 Timing Diagrams VSENSEx Hysteresis tSD + tCTRx VPOR UVLO(MIN) VDD(MIN) VDD SENSEx VITN (UV) + VHYS VITN (UV) RESETx_UVxx tCTSx tCTRx *See Note C tSD + tCTRx RESETx_UVxx tCTSx tCTRx *See Note C t < tCTSx A. For open-drain output option, the timing diagram assumes the RESETx_UVOD / RESETx_UVOD pin is connected via an external pull-up resistor to VDD. B. Be advised that Figure 7-1 shows the VDD falling slew rate is slow or the VDD decay time is much larger than the propagation detect delay (tCTRx) time. C. RESETx_UVxx / RESETx_UVxx is asserted when VDD goes below the UVLO(MIN) threshold after the time delay, tCTRx, is reached. Figure 7-1. SENSEx Undervoltage (UV) Timing Diagram TPS38-Q1 SNVSBI8C – AUGUST 2020 – REVISED DECEMBER 2021 www.ti.com 10 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS38-Q1 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |