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TPS38 датащи(PDF) 33 Page - Texas Instruments |
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TPS38 датащи(HTML) 33 Page - Texas Instruments |
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33 / 53 page ![]() The DYY layout example in Figure 11-2 shows how the TPS38-Q1 is laid out on a printed circuit board (PCB) with user-defined delays. Monitored Voltage Overvoltage Flag CVDD 2 3 12 4 11 5 10 14 GND RPU2 1 VDD RPU1 Undervoltage Flag TPS38-Q1 Monitored Voltage V PULL-UP V PULL-UP 6 7 9 8 DYY Package GND 13 GND CSENSE1 CSENSE2 NC NC NC Vias used to connect pins for application-specific connections Figure 11-2. TPS38-Q1 DYY Package Recommended Layout 11.3 Creepage Distance Per IEC 60664 Creepage is the shortest distance between two conductive parts or as shown in Figure 11-3 the distance between high voltage conductive parts and grounded parts, the floating conductive part is ignored and subtracted from the total distance. a b B A C Figure 11-3. Creepage Distance Figure 11-3 details: • A = Left pins (high voltage) • B = Central pad (not internally connected, can be left floating or connected to GND) • C = Right pins (low voltage) • Creepage distance = a + b www.ti.com TPS38-Q1 SNVSBI8C – AUGUST 2020 – REVISED DECEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 33 Product Folder Links: TPS38-Q1 |
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