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SMS45 датащи(PDF) 7 Page - Summit Microelectronics, Inc. |
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SMS45 датащи(HTML) 7 Page - Summit Microelectronics, Inc. |
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7 / 20 page ![]() 7 2079 1.2 05/24/04 SMS45 SUMMIT MICROELECTRONICS, Inc. Preliminary Information A1,A2 (6, 7) A1 and A2 are the address inputs. When addressing the SMS45 memory or configuration registers the address inputs distinguish which one of four possible devices sharing the common bus is being addressed. SDA (9) SDA is the serial data input/output pin. It should be tied to VDD_CAP through a pull-up resistor. SCL (10) SCL is the serial clock input. It should be tied to VDD_CAP through a pull-up resistor. PUP#1, PUP#2, PUP#3 (4, 5, 13) These are the power-up permitted (PUP) active low open drain outputs. The PUP pins are used when the SMS45 is programmed to provide the cascade sequencing of LDOs or DC/DC converters (see Figures 1 and 5 for illustra- tions of cascading). Each delay is independently enabled and programmable for its duration (configuration register 7). If all PUP# outputs are enabled the order of events would be as follows: V0 above threshold then delay to PUP#1 turning on; V1 above threshold then delay to PUP#2 turning on; V2 above threshold then delay to PUP#3 turning on. The delays are programmable. PIN DESCRIPTIONS (CONTINUED) |
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