7

2047 2.3 10/23/00

SMS44

SUMMIT MICROELECTRONICS, Inc.

Table 1. Configuration Register 4

DEVICE OPERATION

2047 Table01 1.0

SUPPLY AND MONITOR FUNCTIONS

that any one of the four can act as the device supply. The

RESET# output will be guaranteed true so long as one of

the four pins is at or above 1V.

Note: for performing a memory operation (read or

write) and to have the ability to change configura-

tion register contents at least one supply input

must be above 2.7V.

the primary supply and is the first to become active.

Associated with each input is a comparator with a pro-

grammable threshold for detection of under-voltage con-

ditions on any of the four supply inputs. The threshold can

be programmed in 20mV increments anywhere within the

range of 0.9V to 6.0V. Configuration registers 0, 1, 2, and

If the value contained in the register is all zeroes, the

corresponding threshold will be 0.9V. If the contents were

×

0.02V)]. All four registers are configured as 8-bit registers.

RESET AND IRQ FUNCTIONS

Both the reset and interrupt outputs have four program-

mable sources for activation. Configuration register 4 is

used for selecting the activation source, which can be any

be programmed to activate on either an under-voltage or

over-voltage condition, but not both conditions.

The RESET# output has two hardwired sources for activa-

tion: the MR# input, and the expiration of the Longdog

timer. RESET# will remain active so long as MR# is low,

(programmable reset time out) after MR# returns high.

The MR# input cannot be bypassed or disabled. The

Longdog timer can be bypassed by programming it to the

off or idle mode.

The watchdog is the sole hardwired source for driving the

IRQ# output low.

It can effectively be bypassed by

programming it to the off or idle mode. Refer to Figures 1,

2, 3 and 4 for a detailed illustration of the relationships

among the affected signals.

The SMS44 also provides the option of the monitors

triggering on either an under-voltage or over-voltage con-

dition. The low-order four bits of configuration register 5

program these options.

The high order four bits of configuration register 5 are read

only, and their state indicates the sources of interrupts.

Whenever an interrupt is generated the status of the V

inputs will be recorded in the status register. The status

will remain in the register until the device is powered-down

7

B

S

M

65432

1

0

B

S

L

V

3

V

2

V

1

V

0

V

3

V

2

V

1

V

0

e

c

r

u

o

S

r

e

g

g

i

r

T

T

E

S

E

Re

c

r

u

o

S

r

e

g

g

i

r

T

Q

R

I

or another interrupt occurs that overwrites the previous

status.

If an interrupt occurs and no bits are set the default

assumption must be the watchdog generated the inter-

rupt.

WATCHDOG AND LONGDOG TIMERS

The SMS44 contains two timers that can be programmed

independently. The Watchdog is intended to be of shorter

duration and will generate an interrupt if it times out. The

3

B

S

M

21

0

B

S

L

V

3

V

2

V

1

V

0

s

e

l

b

a

n

e

0

a

g

n

i

t

i

r

W

r

o

f

n

o

i

t

c

e

t

e

d

e

g

a

t

l

o

v

r

e

d

n

u

t

u

p

n

i

V

d

e

t

c

e

l

e

s

e

h

t

0000

s

e

l

b

a

n

e

1

a

g

n

i

t

i

r

W

r

o

f

n

o

i

t

c

e

t

e

d

e

g

a

t

l

o

v

r

e

v

o

t

u

p

n

i

V

d

e

t

c

e

l

e

s

e

h

t

1111

2047 Table03 1.0

2047 Table02 1.0

Table 2. Configuration Register 5

7

B

S

M

65

4

B

S

L

V

3

V

2

V

1

V

0

0000

e

h

t

s

e

t

a

c

i

d

n

i

1

a

g

n

i

d

a

e

R

t

p

u

r

r

e

t

n

i

e

h

t

f

o

e

c

r

u

o

s

1111

Table 3. Configuration Register 5