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MIC33153 датащи(PDF) 13 Page - Microchip Technology |
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MIC33153 датащи(HTML) 13 Page - Microchip Technology |
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13 / 28 page ![]() 2019 - 2022 Microchip Technology Inc. DS20006223B-page 13 MIC33153 4.0 FUNCTIONAL DESCRIPTION 4.1 VIN The input supply (VIN) provides power to the internal MOSFETs for the switch mode regulator along with the internal control circuitry. The VIN operating range is 2.7V to 5.5V so an input capacitor, with a minimum voltage rating of 6.3V, is recommended. Due to the high switching speed, a minimum 2.2 µF bypass capacitor placed close to VIN and the power ground (PGND) pin is required. 4.2 EN A logic high signal on the enable pin activates the output voltage of the device. A logic low signal on the enable pin deactivates the output and reduces supply current to 0.01 µA. MIC33153 features external soft-start circuitry via the soft-start (SS) pin that reduces in rush current and prevents the output voltage from overshooting at start up. Do not leave the EN pin floating. 4.3 SW The switch (SW) connects directly to one end of the inductor and provides the current path during switching cycles. The other end of the inductor is connected to the load, SNS pin and output capacitor. Due to the high speed switching on this pin, the switch node should be routed away from sensitive nodes whenever possible. 4.4 SNS The sense (SNS) pin is connected to the output of the device to provide feedback to the control circuitry. The SNS connection should be placed close to the output capacitor. 4.5 AGND The analog ground (AGND) is the ground path for the biasing and control circuitry. The current loop for the signal ground should be separate from the power ground (PGND) loop. 4.6 PGND The power ground pin is the ground path for the high current in PWM mode. The current loop for the power ground should be as small as possible and separate from the analog ground (AGND) loop as applicable. 4.7 Power Good (PG) The Power Good (PG) pin is an open-drain output that indicates logic high when the output voltage is typically above 92% of its steady state voltage. When the output voltage is below 86%, the PG pin indicates logic low. A pull up resistor of more than 10 kΩ should be connected from PG to VOUT. 4.8 Soft-Start The soft-start (SS) pin is used to control the output voltage ramp up time. The approximate equation for the ramp time in milliseconds is: EQUATION 4-1: For example, for a CSS = 470 pF, TRISE ~ 0.3 ms or 300 µs. See Section 2.0, Typical Performance Curves for a graphical guide. The minimum recommended value for CSS is 100 pF. 4.9 FB The feedback (FB) pin is provided for the adjustable voltage option (no internal connection for fixed options). This is the control input for programming the output voltage. A resistor divider network is connected to this pin from the output and is compared to the internal 0.62V reference within the regulation loop. The output voltage can be programmed between 0.65V and 3.6V using the following equation: EQUATION 4-2: tSS 270 10 3 ln 10 CSS = Where: tSS = Soft-start ramp up time of VOUT CSS = External soft-start capacitance (in Farads) VOUT VREF 1 R1 R2 ------- + = Where: R1 = Top resistor R2 = Bottom resistor VREF = 0.62V |
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