AD9213 datasheet(40/110 Pages) AD

40 / 110 page

AD9213

Data Sheet

Rev. A | Page 40 of 110

When MAW is zero, the programmable modulus logic is

automatically disabled.

For example, if the fS of the ADC is 10 GSPS and the fC is

2.6 GHz, then,





48 mod 1.25,10

round 2

0x2000 _ 0000 _ 0000

FTW









The actual carrier frequency (fC_ACTUAL) can be calculated based

on the following equation:

fC_ACTUAL = (FTW × fS)/248

For the previous example, the fC_ACTUAL is

fC_ACTUAL = (0x2000_0000_0000 × 10)/248 = 1.25 GHz

A 48-bit POW is available for each NCO to create a known

phase relationship between multiple chips or individual DDC

channels inside the chip.

In coherent mode, the FTW and POW registers can be updated

at any time and maintain deterministic phase results in the

NCO.

NCO Channel Selection

When configured in coherent mode, only one FTW is required

in the NCO. In this mode, the user can switch to any tuning

frequency without the need to reset the NCO by writing to the

FTW directly. However, for fast switching applications, where

either all FTWs are known beforehand or it is possible to queue

up the next set of FTWs, the NCO contains 16 additional

shadow registers (see Figure 96). These shadow registers are

referred to as the NCO channels.

Figure 96 shows a simplified block diagram of the NCO channel

selection block.

Only one NCO channel is active at a time, and NCO channel

selection is controlled by the CMOS GPIO pins, the register

map, or the profile select timer.

Each NCO channel selector supports four different modes, as

described in the following sections.

NCO CHANNEL

SELECTION

NCO CHANNEL SELECTION

COUNTER

SYNCHRONIZATION

CIRCUIT

GPIO

CMOS

PINS

TRIGGER

GPIO

SELECTION

MUX

INC

BIT 0

NCO

CHANNEL SELECTION

0x632

NCO CHANNEL MODE

[1:0]

[0]

MAP

Figure 96. NCO Channel Selection Block

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