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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM8L151X6 датащи(PDF) 119 Page - STMicroelectronics |
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STM8L151X6 датащи(HTML) 119 Page - STMicroelectronics |
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119 / 147 page  DS6948 Rev 11 119/147 STM8L151x6/8 STM8L152x6/8 Electrical parameters 124 Figure 43. ADC1 accuracy characteristics Figure 44. Typical connection diagram using the ADC 1. Refer to Table 53 for the values of RAIN and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. (1) Example of an actu al transfe r curve (2) The ideal transfer cu rve (3) End point correlation line 4095 4094 4093 5 4 3 2 1 0 7 6 12 3 4 56 7 4093 4094 4095 4096 (1) (2) (3) ai14395e ET = Total unadjusted Error: maximum deviation between the actual and the ideal transfer curves. EO = Offset Error: deviation between the first actual transition and the last actual one. EG = Gain Error: deviation between the last ideal transition and the last actual one. ED = Differential Linearity Error: maximum deviation between actual steps and the ideal one. EL = Integral Linearity Error: maximum deviation between any actual transition and the end-point correlation line. VSSA VDDA 1 LSB IDEAL ED EL EO ET EG [1LSB IDEAL = VREF+ 4096 VDDA 4096 (or depending on package) ai17090f STM8 IL± 50nA 12-bit converter Sample and hold ADC converter VAIN RAIN (1) AINx VDD VT 0.6V VT 0.6V Cparasitic (2) RADC CADC (1) |
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