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SPC58ECX датащи(PDF) 133 Page - STMicroelectronics

номер детали SPC58ECX
подробное описание детали  SPC58 C Line - 32 bit Power Architecture automotive MCU Dual z4 cores 180 MHz, 4 MBytes Flash, HSM, ASIL-B
PDF  153 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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SPC58ECX датащи(HTML) 133 Page - STMicroelectronics

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DS11620 Rev 8
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SPC584Cx, SPC58ECx
Package information
135
5.6.5
FPBGA292
5.6.6
General notes for specifications at maximum junction temperature
An estimation of the chip junction temperature, TJ, can be obtained from the equation:
Equation 1
TJ = TA + (RθJA * PD)
where:
TA = ambient temperature for the package (°C)
RθJA = junction-to-ambient thermal resistance (°C/W)
PD = power dissipation in the package (W)
The thermal resistance values used are based on the JEDEC JESD51 series of standards
to provide consistent values for estimations and comparisons. The differences between the
values determined for the single-layer (1s) board compared to a four-layer board that has
two signal layers, a power and a ground plane (2s2p), demonstrate that the effective
thermal resistance is not a constant. The thermal resistance depends on the:
Construction of the application board (number of planes)
Effective size of the board which cools the component
Quality of the thermal and electrical connections to the planes
Power dissipated by adjacent components
Connect all the ground and power balls to the respective planes with one via per ball. Using
fewer vias to connect the package to the planes reduces the thermal performance. Thinner
planes also reduce the thermal performance. When the clearance between the vias leaves
the planes virtually disconnected, the thermal performance is also greatly reduced.
Table 78. Thermal characteristics for 292-pin FPBGA
Symbol
C
Parameter(1)
Conditions
Value
Unit
RθJA
CC
D Junction-to-Ambient, Natural Convection (2)
Four layer board (2s2p)
(External Ballast)
24.4
°C/W
RθJB
CC
D
Junction-to-board(3)
External Ballast
13
°C/W
RθJC
CC
D
Junction-to-case(4)
External Ballast
9
°C/W
ΨJT
CC
D
Junction-to-package top(5)
Natural convection
(External Ballast)
1.1
°C/W
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Per JEDEC JESD51-6 with the board (JESD51-9) horizontal.
3. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured
on the top surface of the board near the package.
4. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
5. Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2.



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