SPC58ECX datasheet(132/153 Pages) STMICROELECTRONICS

132 / 153 page

Package information

SPC584Cx, SPC58ECx

132/153

DS11620 Rev 8

5.6.4

LQFP176

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.

3. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured

on the top surface of the board near the package.

4. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883

Method 1012.1).

5. Thermal resistance between the die and the exposed pad ground on the bottom of the package based on simulation

without any interface resistance.

6. Thermal characterization parameter indicating the temperature difference between package top and the junction

temperature per JEDEC JESD51-2.

Table 77. Thermal characteristics for 176 exposed pad LQFP package

Symbol

Parameter(1)

Conditions

Value

Unit

RθJA

D Junction-to-Ambient, Natural Convection(2)

Four layer board (2s2p)

(External Ballast)

°C/W

Four layer board (2s2p)

(Internal Ballast)

26.1

RθJB

Junction-to-board(3)

External Ballast

10.9

°C/W

Internal Ballast

13.9

RθJCtop

Junction-to-case top(4)

External Ballast

10.2

°C/W

Internal Ballast

13.2

RθJCbottom CC D

Junction-to-case bottom(5)

External Ballast

°C/W

Internal Ballast

3.7

ΨJT

Junction-to-package top(6)

Natural convection

External Ballast

°C/W

Internal Ballast

3.5

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal.

3. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured

on the top surface of the board near the package.

4. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883

Method 1012.1).

5. Thermal resistance between the die and the exposed pad ground on the bottom of the package based on simulation

without any interface resistance.

6. Thermal characterization parameter indicating the temperature difference between package top and the junction

temperature per JEDEC JESD51-2.

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