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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F469AE датащи(PDF) 35 Page - STMicroelectronics |
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STM32F469AE датащи(HTML) 35 Page - STMicroelectronics |
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35 / 220 page  DS11189 Rev 7 35/220 STM32F469xx Functional overview 47 Figure 12. Startup in regulator OFF mode: fast VDD slope - power-down reset risen before VCAP_1 , VCAP_2 stabilization 1. This figure is valid whatever the internal reset mode (ON or OFF). 2.20.3 Regulator ON/OFF and internal reset ON/OFF availability 2.21 Real-time clock (RTC), backup SRAM and backup registers The backup domain includes: The real-time clock (RTC) 4 Kbytes of backup SRAM 20 backup registers The real-time clock (RTC) is an independent BCD timer/counter. Dedicated registers contain the second, minute, hour (in 12/24 hour), week day, date, month, year, in BCD (binary- coded decimal) format. Correction for 28, 29 (leap year), 30, and 31 day of the month are performed automatically. The RTC provides a programmable alarm and programmable periodic interrupts with wakeup from Stop and Standby modes. The sub-seconds value is also available in binary format. It is clocked by a 32.768 kHz external crystal, resonator or oscillator, the internal low-power RC oscillator or the high-speed external clock divided by 128. The internal low-speed RC VDD time Min V12 VCAP_1, VCAP_2 V12 PA0 NRST time ai18492f PDR = 1.7 or 1.8 V (2) Table 4. Regulator ON/OFF and internal reset ON/OFF availability Package Regulator ON Regulator OFF Internal reset ON Internal reset OFF WLCSP168 UFBGA169 LQFP144 LQFP208 Yes No Yes PDR_ON set to VDD Yes PDR_ON set to VSS LQFP176 UFBGA176 TFBGA216 Yes BYPASS_REG set to VSS Yes BYPASS_REG set to VDD LQFP100 Yes No Yes No |
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