Data may be changed without notice - Proprietary information of Yamar Electronics Ltd.

©2019-2022 Yamar Electronics Ltd.

8

DS-DMX250 R 0.80

www.yamar.com

Tel: +972-3-5445294 Fax: +972-3-5445279

2.5.4.1

Recommended L1 & L2 inductors

Table 2 describes the recommended L1 and L2 inductors.

Table 2 - Recommended L1 and L2 manufacturers

Inductor

ABRACON

VISHAY

TDK

L1=3.3uH

815-AIML-0805-3R3K-T ILSB0805ER3R3K MLF2012A3R3JT000

L2=15uH

815-AIML-0805-150K-T ILSB0805ER150K MLF2012C150KT000

L1=18uH

815-AIML-0805-180K-T ILSB0805ER180K MLF2012C180KT000

2.5.5

Optional EMC chip-bead (L5)

For enhanced mitigation of high harmonics above 30MHz conducted over the powerline, it is recommended to add

L5 in series to the coupling capacitor C4 (see Figure 4).

Table 3 describes the recommended EMC chip-beads.

Table 3 - Recommended L5 (optional)

LAIRD

MI0603L301R-10

LAIRD

HZ0603A222R-10

TDK

MMZ1608Q

2.5.6

TXO output level and drive control

The TXO pin output level and drive capability to the powerline are controlled by REG_1[3], as described in Table 4.

Table 4 - TXO signal level

TXON State

REG_1[3]

TX level [V-p-p]

High

'0'

1

'1' (Default)

2

Low (Rx)

High Z

Setting the TXO output drive capability is made by configuring REG_1[0], as described in Table 5.

Table 5- TXO output drive control

TXON State

REG_1[0]

Output drive [A]

Impedance [Ω]

High

'0' (Default)

33mA

18

1

'1'

66mA

Low (Rx)

Disabled

5.3k

2

2.5.7

Ceramic capacitors

Low ESR capacitors will provide better performance. X5R and X7R capacitors are recommended, especially for

Vcap (C8) and PLLCAP (C3).

2.5.8

Powerline coupling interface

The DMX250 is coupled to the powerline through a single small footprint coupling capacitor that blocks the DC,

2.5.8.1

External protection network

powerline pulses (above 2 V-P-P). The protection network consists of three Schottky diodes serially connected (for

both polarities), with low capacitance (< 10pF) and fast clipping (e.g. BAS70-04).

2.5.8.2

AC Powerline coupling interface

Figure 8 presents a possible high voltage AC and DC powerline interface. The DMX high-frequency carrier is

coupled to the powerline via capacitors C7 and C8. D5, D6, and D7 are external protection networks that clip the

residual high voltage impulses that may pass via C7 and C8.