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Document Number: 91109

4

S11-1052-Rev. C, 30-May-11

This document is subject to change without notice.

IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

1

10

100

1000

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

10000

Coss

Crss

Ciss

VGS = 0V,

f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Coss = Cds+ Cgd

0

4

8

12

16

20

24

0

4

8

12

16

20

Q , Total Gate Charge (nC)

G

FOR TEST CIRCUIT

SEE FIGURE

I =

D

13

3.6A

V

= 120V

DS

V

= 300V

DS

V

= 480V

DS

0.1

1

10

100

0.4

0.6

0.8

1.0

1.2

V

,Source-to-Drain Voltage (V)

SD

V

= 0 V

GS

T = 25 C

J

°

T = 150 C

J

°

0.1

1

10

100

10

100

1000

10000

OPERATION IN THIS AREA LIMITED

Single Pulse

T

T

= 150 C

= 25 C

°

°

J

C

V

, Drain-to-Source Voltage (V)

DS

10us

100us

1ms

10ms