8 / 13 page
FS8160
Page 8
April 2003
cated below.
The definition of the contents of the shift register relating to each particular latch location
is listed in the table below.
The 12-bit main and auxiliary reference (R) divider ratios are specified by the
MAINR[11:0] and AUXR[11:0] bits, respectively, and are defined in the table below.
Table 1: Latch enable control bits
CB[1]
CB[0]
Latch Location
0
0
Aux. R
0
1
Aux. N
10
Main R
11
Main N
Table 2: Serial data input format
First
bit
Shift Register Bit Location
Last
bit
17
16
15
14
13
12
11
10
9876543210
Aux. R
FOLD[3:0]
AUXR[11:0])
0
0
Aux. N
AUXB[11:0]
AUXA[3:0]
0
1
Main R
CP_CNTRL[3:0]
MAINR[11:0]
1
0
Main N
MAINB[11:0]
MAINA[3:0]
1
1
Table 3: Reference divider ratios
Divide
Ratio
MAINR[11:0] and AUXR[11:0]
11
10
9876543210
2
000000000010
3
000000000011
•
••••••••••••
4095
111111111111
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
