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UCD7100APWPR датащи(PDF) 17 Page - Texas Instruments

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номер детали UCD7100APWPR
подробное описание детали  UCD7100 Digital Control Compatible Single Low-Side 짹4-A MOSFET Driver with Current Sense
PDF  30 Pages
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UCD7100APWPR датащи(HTML) 17 Page - Texas Instruments

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11 Power Supply Recommendations
11.1 Supply
The UCD7K devices accept an input range of 4.5 V to 15 V. The device has an internal precision linear regulator
that produces the 3V3 output from this VDD input. A separate pin, PVDD, not connected internally to the VDD
supply rail provides power for the output drivers. In all applications the same bus voltage supplies the two pins. It
is recommended that a low value of resistance be placed between the two pins so that the local capacitance on
each pin forms low pass filters to attenuate any switching noise that may be on the bus.
Although quiescent VDD current is low, total supply current will be higher, depending on the gate drive output
current required by the switching frequency. Total VDD current is the sum of quiescent VDD current and the
average OUT current. Knowing the operating frequency and the MOSFET gate charge (QG), average OUT
current can be calculated from:
IOUT = QG x f, where f is frequency.
For high-speed circuit performance, a VDD bypass capacitor is recommended to prevent noise problems. A
4.7-µF ceramic capacitor should be located close to the VDD to ground connection. A larger capacitor with
relatively low ESR should be connected to the PVDD pin, to help deliver the high current peaks to the load. The
capacitors should present a low impedance characteristic for the expected current levels in the driver application.
The use of surface mount components for all bypass capacitors is highly recommended.
11.2 Reference and External Bias Supply
All devices in the UCD7K family are capable of supplying a regulated 3.3-V rail to power various types of
external loads such as a microcontroller or an ASIC. The onboard linear voltage regulator is capable of sourcing
up to 10 mA of current. For normal operation, place a minimum of 0.22 µF of ceramic capacitance from the
reference pin to ground.
www.ti.com
UCD7100
SLUS651E – MARCH 2005 – REVISED NOVEMBER 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: UCD7100



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