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TPS37 датащи(PDF) 8 Page - Texas Instruments |
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TPS37 датащи(HTML) 8 Page - Texas Instruments |
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8 / 48 page ![]() 7.5 Electrical Characteristics (continued) At VDD(MIN) ≤ VDD ≤ VDD (MAX), CTR1/MR = CTR2/MR = CTS1 = CTS2 = open, output reset pull-up resistor RPU = 10 kΩ, voltage VPU = 5.5 V, and load CLOAD = 10 pF. The operating free-air temperature range TA = – 40°C to 125°C, unless otherwise noted. Typical values are at TA = 25°C and VDD = 16 V and VIT = 6.5 V (VIT refers to VITN or VITP). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Capacitor Timing (CTS, CTR) RCTR Internal resistance (CTR1 / MR , CTR2 / MR ) 877 1000 1147 Kohms RCTS Internal resistance (CTS1, CTS2) 88 100 122 Kohms Manual Reset (MR) VMR_IH CTR1 / MR and CTR2 / MR pin logic high input VDD = 2.7 V 2200 mV VMR_IH CTR1 / MR and CTR2 / MR pin logic high input VDD = 65 V 2500 mV VMR_IL CTR1 / MR and CTR2 / MR pin logic low input VDD = 2.7 V 1300 mV VMR_IL CTR1 / MR and CTR2 / MR pin logic low input VDD = 65 V 1300 mV (1) When VDD voltage falls below UVLO, reset is asserted for Output 1 and Output 2. VDD slew rate ≤ 100 mV / µs (2) VPOR is the minimum VDD voltage for a controlled output state. Below VPOR, the output cannot be determined. VDD dv/dt ≤ 100mV/µs (3) For adjustable voltage guidelines and resistor selection refer to Adjustable Voltage Thresholds in Application and Implementation section (4) Hysteresis is with respect to VITP and VITN voltage threshold. VITP has negative hysteresis and VITN has positive hysteresis. (5) For VOH and VOL relation to output variants refer to Timing Figures after the Timing Requirement Table TPS37 SNVSBJ1D – OCTOBER 2020 – REVISED DECEMBER 2021 www.ti.com 8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TPS37 |
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