Copyright © 2002/2003
Solomon Systech Limited.
REV 1.4
01/03
This document contains information on a new product. Specifications and information herein are subject to change without notice.
SSD1820A
SSD1821
ORDERING INFORMATION
SSD1820AZ
Gold Bump Die
SSD1821Z
Gold Bump Die
SSD1820ATR1
TAB
SSD1821TR1
TAB
Gold Bump Die
TAB
SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
Advance Information
LCD Segment / Common Driver
with Controller
CMOS
SSD1820A/21 is a single-chip CMOS LCD driver with controller for a liquid crystal
dot-matrix graphic display system. SSD1820A consists of 194 high voltage driving out-
put pins for driving 128 Segments, 64 Commons and 2 icon driving Commons, while
SSD1821 consists of 210 high voltage driving output pins for driving 128 Segments,
80 Commons and 2 icon driving Commons.
SSD1820A/21 displays data directly from its internal 128x65/128X81 bits Graphic
Display Data RAM (GDDRAM). Data/Commands are sent from general MCU through
a hardware selectable 6800-/8080-series compatible Parallel Interface or 3/4 wires
Serial Peripheral Interface.
SSD1820A/21 embeds a DC-DC Converter, a LCD Voltage Regulator, an On-
Chip Bias Divider and an On-Chip Oscillator which reduce the number of external
components. With the special design on minimizing power consumption and die/pack-
age layout, SSD1820A/21 is suitable for any portable battery-driven applications re-
quiring a long operation period and a compact size.
•
128 x 64/80 Graphic Display with a Icon Line
•
Programmable Multiplex ratio [16Mux - 65Mux/81Mux] (Partial Display)
•
Single Supply Operation, 1.8 V - 3.3V
•
Low Current Sleep Mode(<1.0uA)
•
On-Chip Voltage Generator / External Power Supply
•
Software selectable 2X / 3X / 4X / 5X / 6X On-Chip DC-DC Converter
•
On-Chip Oscillator
•
Software Selectable On-Chip Bias Dividers
•
Programmable 1/4, 1/5, 1/6, 1/7, 1/8, 1/9 and 1/10 bias ratio
•
Maximum +15.0V LCD Driving Output Voltage
•
Hardware pin selectable for 8-bit 6800-series Parallel Interface, 8-bit 8080-series Par-
allel Interface, 3-wire Serial Peripheral Interface or 4-wire Serial Peripheral Interface
•
On-Chip 128 x 65/81 Graphic Display Data RAM
•
Re-mapping of Row and Column Drivers
•
Vertical Scrolling
•
Display Offset Control
•
64 Levels Internal Contrast Control
•
External Contrast Control
•
Maximum 17MHz SPI or 15MHz PPI operation
•
Selectable LCD Driving Voltage Temperature Coefficients (2 settings)
•
Available in Gold Bump Die and Standard TAB (Tape Automated Bonding) Package
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