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AS3955 датащи(PDF) 46 Page - ams AG

номер детали AS3955
подробное описание детали  NFC Forum Compliant Dynamic Tag
PDF  102 Pages
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производитель  AMSCO [ams AG]
домашняя страница  http://www.ams.com
Logo AMSCO - ams AG

AS3955 датащи(HTML) 46 Page - ams AG

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Page 46
ams Datasheet
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[v1-04] 2016-Feb-03
AS3955 − Detailed Description
Interrupts:
• Rx start (I_rxs bit in Interrupt Register 1)
• Rx end, Tx end (resp. I_rxe and I_txe bits in Interrupt
Register 0)
• CRC, parity and framing interrupt (resp. I_crc_err, I_par_
err and I_frm_err bits in Interrupt Register 1)
• Buffer error (I_bf_err in Interrupt Register 1)
• SPI / I²C buffer access error (I_acc_err in
Interrupt Register 1)
Commands:
• Transmit ACK
• Transmit NACK 0-5
• Transmit Buffer
• Go To Sense
• Go To Sleep
• Go To Sense / Sleep
Extended Mode
Extended mode enables communication between the NFC
device and MCU by employing standard NFC Tag 2 Type READ
and WRITE commands. The purpose of this communication
mode is to provide a simple data transfer mechanism between
a NFC device and a MCU while guaranteeing correct timing and
synchronization. This is achieved by implementing a robust
handshake mechanism.
This mode uses a part of the memory address space that is out
of range of the internal physical memory. The communication
between a NFC device and a MCU can be performed by using
WRITE/READ commands on address FCh – FFh, independently
of the EEPROM configuration size. Data with CRC or any other
error will not be forwarded to the MCU. In case of successful
reception of data, AS3955 will automatically reply with ACK.
Error handling in Extended mode is defined in Error Handling.
Data received from RF side are kept available until the MCU
reads the data. The implemented asynchronous transmission
protocol arbitrates on overlapping memory accesses
(producer-consumer principle) and complies with timing
constraints of both RF and SPI / I²C protocols regardless of the
MCU performance.
Extended mode can be configured by setting Configuration
Byte IC_CFG2 in EEPROM or the corresponding register ( IC
Configuration Register 2).



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