AS3955 datasheet(74/102 Pages) AMSCO

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[v1-04] 2016-Feb-03

AS3955 − Detailed Description

After data is received, the microcontroller shall check the

amount of bytes actually received. This information is available

in the Buffer Status Register 2, which displays number of bytes

in the buffer not yet read out. Buffer Status Register 1

additionally contains a flag indicating buffer overflow.

EEPROM Read and Write

The EEPROM can be accessed from SPI / I²C interface or over RF

field issuing NFC read and write commands. The EEPROM access

is controlled by the internal EEPROM controller. Since the

mutual access to the EEPROM is not possible AS3955 needs to

arbitrate between MCU and NFC device in cases of mutual

access. How this is handled it is defined according to arbit_mod

bit. Typical EEPROM programing time is 8.3 ms and should not

exceed 9.5 ms. Please note that word data is sent MSB first which

is opposite to the RFID EEPROM programming where LSB is sent

first.

Three interrupts can be triggered during EEPROM read or write:

• When EEPROM programing is executed successfully an I_

io_eewr interrupt is triggered.

• When EEPROM programming is terminated due to higher

priority of the RF part, writing to a non-existent address

or writing is not allowed an I_eeac_err interrupt is

triggered.

• When EEPROM is busy and can’t be accessed an I_acc_err

interrupt is triggered

Note that EEPROM does not contain any kind on ant tearing

mechanism that would allow detection of corrupted data

The valid range for the Block Address byte depends on the

EEPROM size. For 4kbit EEPROM, the valid range for the Block

Address byte is from 000_0000b to 111_1111b (EEPROM blocks

from 00h to 7Fh).

Data Buffer

Data in buffer is organized in bytes; each byte is terminated by

a parity bit. Data bits in a byte are numbered from b1 to b8

where b1 is LSB bit, LSB is sent first.

Data sent over SPI / I²C is also organized in bytes, bits in a byte

are marked D0 to D7, where D0 is LSB bit, MSB is sent first.

During reception, the framing engine checks the parity bit and

removes it from data frame, and only data bytes are put into

buffer. During transmission, the process is reversed, only data

bytes are put into buffer, while the framing engine adds the

parity bits.

The data bits b1 to b8 are mapped to buffer data bits D0 to D7,

which means that the order of receiving/transmitting bits in a

byte is reversed (the bytes are sent LSB first while the SPI / I²C

bytes are sent MSB first).

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