AS3911 datasheet(76/159 Pages) AMSCO

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[v2-11] 2016-Jun-13

AS3911 − Application Information

ISO14443B and FeliCa Settings Register

Figure 54:

ISO14443B and FeliCa Settings Register

Note(s):

1. Default setting is set at power-up and after Set Default command.

2. Detection of EOF requires larger tolerance range for bit rates with only one sub-carrier frequency period per bit (fc/16 and higher).

Due to this it is not possible to distinguish between EOF with 11 and 12 etu and setting this bit has no impact on EOF detection.

Figure 55:

Minimum TR1 Codings

Note(s):

1. TR1 is defined in number of sub-carrier cycles, therefore at VHBR the absolute time becomes shorter.

Address 07h: ISO14443B and FeliCa Settings Register

Type: RW

Bit

Name

Default

Function

Comments

7tr1_1

Refer to Minimum TR1

Coding

6tr1_0

5no_sof

1: No SOF PICC to PCD

According to ISO14443-3 chapter

7.10.3.3

Support of B’

4no_eof

1: No EOF PICC to PCD

According to ISO14443-3 chapter

7.10.3.3

3eof_12

0: PICC EOF 10 to 11 etu

1: PICC EOF 10 to 12 etu

Support of B’ (2)

2phc_th

1: Increased tolerance of

phase change detection

1f_p1

00: 48

01: 64

10: 80

11: 96

FeliCa preamble length (valid

also for NFCIP-1 active

communication bit rates 242 and

484 kbit/s)

0f_p0

Minimum TR1 Coding

tr1_1

tr1_0

Minimum TR1 for a PICC to PCD Bit Rate

fc / 128

> fc / 128

80 / fs

64 / fs

32 / fs

Not used

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