LT8331 datasheet(8/24 Pages) AD

8 / 24 page

LT8334

Rev. 0

For more information www.analog.com

OPERATION

The LT8334 uses a fixed frequency, current mode con-

trol scheme to provide excellent line and load regulation.

Operation can be best understood by referring to the Block

Diagram. An oscillator (with frequency programmed by a

resistor at the RT pin) turns on the internal power switch

at the beginning of each clock cycle. Current in the induc-

tor then increases until the current comparator trips and

turns off the power switch. The peak inductor current at

which the switch turns off is controlled by the voltage on

the VC pin. The error amplifier servos the VC pin by com-

paring the voltage on the FBX pin with an internal refer-

ence voltage (1.60V or –0.80V, depending on the chosen

topology). When the load current increases it causes a

reduction in the FBX pin voltage relative to the internal

reference. This causes the error amplifier to increase

the VC pin voltage until the new load current is satisfied.

In this manner, the error amplifier sets the correct peak

switch current level to keep the output in regulation. The

LT8334 has overvoltage protection as an intrinsic feature

of the pulse-skipping and Burst Mode of operation. If VOUT

increases above the regulation voltage, this will increase

the voltage on the FBX pin above the internal reference

voltage. This causes the error amplifier to decrease the VC

pin voltage, which will naturally stop the switching as the

part enters a full pulse-skipping or Burst Mode idle state.

The LT8334 can generate either a positive or negative out-

put voltage with a single FBX pin. It can be configured as

a boost or SEPIC converter to generate a positive output

voltage, or as an inverting converter to generate a negative

output voltage. When configured as a boost converter,

as shown in the Block Diagram, the FBX pin is pulled up

to the internal bias voltage of 1.60V by a voltage divider

(R1 and R2) connected from VOUT to GND. Amplifier A2

becomes inactive and amplifier A1 performs (inverting)

amplification from FBX to VC. When the LT8334 is in an

inverting configuration, the FBX pin is pulled down to

–0.80V by a voltage divider from VOUT to GND. Amplifier

A1 becomes inactive and amplifier A2 performs (nonin-

verting) amplification from FBX to VC.

If the EN/UVLO pin voltage is below 1.6V, the LT8334

enters undervoltage lockout (UVLO), and stops switching.

When the EN/UVLO pin voltage is above 1.68V (typical),

the LT8334 resumes switching. If the EN/UVLO pin volt-

age is below 0.2V, the LT8334 draws less than 1µA from

VIN.

For the SYNC/MODE pin tied to ground or <0.14V, the

LT8334 will enter low output ripple Burst Mode opera-

tion for ultralow quiescent current during light loads to

maintain high efficiency. For a 100k resistor from SYNC/

MODE pin to GND, the LT8334 uses Burst Mode operation

for improved efficiency at light loads but seamlessly tran-

sitions to spread-spectrum modulation of switching fre-

quency for low EMI at heavy loads. For the SYNC/ MODE

pin floating (left open), the LT8334 uses pulse-skip-

ping mode, at the expense of hundreds of microamps,

to maintain output voltage regulation at light loads by

skipping switch pulses. For the SYNC/MODE pin tied to

INTVCC or >1.7V, the LT8334 uses pulse-skipping mode

and performs spread-spectrum modulation of switching

frequency. For the SYNC/MODE pin driven by an external

clock, the converter switching frequency is synchronized

to that clock and pulse-skipping mode is also enabled. See

the Pin Functions section for SYNC/MODE pin.

The LT8334 includes a BIAS pin to improve efficiency

across all loads. The LT8334 intelligently chooses between

the VIN and BIAS pins to supply the INTVCC for best effi-

ciency. The INTVCC supply current can be drawn from

the BIAS pin instead of the VIN pin for 4.4V ≤ BIAS ≤ VIN.

Protection features ensure the immediate disable of

switching and reset of the SS pin for any of the following

faults: internal reference UVLO, INTVCC UVLO, switch cur-

rent > 1.5× maximum limit, EN/UVLO < 1.6V or junction

temperature > 170°C.

LT8331 датащи(PDF) 8 Page - Analog Devices

LT8331 датащи(HTML) 8 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

датащи скачать

ссылки URL