LT8331 datasheet(6/24 Pages) AD

6 / 24 page

LT8334

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

NC (Pin 1): No Internal Connection. Leave this pin open.

EN/UVLO (Pin 2): Shutdown and Undervoltage Detect Pin.

The LT8334 is shut down when this pin is low and active

when this pin is high. Below an accurate 1.6V threshold,

the part enters undervoltage lockout and stops switching.

This allows an undervoltage lockout (UVLO) threshold to

be programmed for system input voltage by resistively

dividing down system input voltage to the EN/UVLO pin.

An 80mV pin hysteresis ensures part switching resumes

when the pin exceeds 1.68V. EN/UVLO pin voltage below

0.2V reduces VIN current below 1µA. If shutdown and

UVLO features are not required, the pin can be tied directly

to system input.

VIN (Pin 3): Input Supply. This pin must be locally

bypassed. Be sure to place the positive terminal of the

input capacitor as close as possible to the VIN pin, and

the negative terminal as close as possible to the exposed

pad PGND copper (near EN/UVLO).

INTVCC (Pin 4): Regulated 3.2V Supply for Internal Loads.

The INTVCC pin must be bypassed with a 1µF low ESR

ceramic capacitor to GND. No additional components or

loading is allowed on this pin. INTVCC draws power from

the BIAS pin if 4.4V ≤ BIAS ≤ VIN, otherwise INTVCC is

BIAS (Pin 5): Second Input Supply for Powering INTVCC.

Removes the majority of INTVCC current from the VIN pin

to improve efficiency when 4.4V ≤ BIAS ≤ VIN. If unused,

tie the pin to GND.

VC (Pin 6): Error Amplifier Output Pin. Tie external com-

pensation network to this pin.

FBX (Pin 7): Voltage Regulation Feedback Pin for Positive

or Negative Outputs. Connect this pin to a resistor divider

between the output and the exposed pad GND copper

(near FBX). FBX reduces the switching frequency during

start-up and fault conditions when FBX is close to 0V.

RT (Pin 8): A resistor from this pin to the exposed pad

GND copper (near FBX) programs switching frequency.

SS (Pin 9): Soft-Start Pin. Connect a capacitor from this

pin to GND copper (near FBX) to control the ramp rate

of inductor current during converter start-up. SS pin

charging current is 2μA. An internal 220Ω MOSFET dis-

charges this pin during shutdown or fault conditions.

SYNC/MODE (Pin 10): This pin allows five selectable

modes for optimization of performance.

SYNC/MODE PIN INPUT

CAPABLE MODE(S) OF OPERATION

(1) GND or <0.14V

BURST

(2) External Clock

PULSE SKIP/SYNC

(3) 100k Resistor to GND

BURST/SSFM

(4) Float (Pin Open)

PULSE SKIP

(5) INTVCC or >1.7V

PULSE SKIP/SSFM

where the selectable modes of operation are:

BURST = low IQ, low output ripple operation at light loads

PULSE SKIP = skipped pulse(s) at light load (aligned to clock)

SYNC = switching frequency synchronized to external clock

SSFM = spread spectrum frequency modulation for low EMI

SW1, SW2 (SW) (Pins 11, 12): Output of the Internal

Power Switch. Minimize the metal trace area connected

to these pins to reduce EMI.

PGND, GND (Pin 13): Power Ground and Signal Ground

for the IC. The package has an exposed pad underneath

the IC which is the best path for heat out of the pack-

age. The pin should be soldered to a continuous copper

ground plane under the device to reduce die temperature

and increase the power capability of the LT8334. Connect

power ground components to the exposed pad copper

exiting near the EN/UVLO and SW pins. Connect signal

ground components to the exposed pad copper exiting

near the VC and FBX pins.

LT8331 датащи(PDF) 6 Page - Analog Devices

LT8331 датащи(HTML) 6 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

датащи скачать

ссылки URL