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PCF8545ATT датащи(PDF) 24 Page - NXP Semiconductors

номер детали PCF8545ATT
подробное описание детали  Automotive 18 횞 4 LCD segment driver
PDF  50 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8545ATT датащи(HTML) 24 Page - NXP Semiconductors

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NXP Semiconductors
PCA8561
Automotive 18 × 4 LCD segment driver
SCL
SDA
ACK
ACK
S
P
aaa-010489
SCL
SDA
bit7
bit0 ACK
ACK
S
START
condition
STOP
condition
P
ACK of 1st byte
from slave
ACK of 2nd byte
from slave
I2C read example
I2C write example
bit7
bit0
1st byte, slave address with R/W = 0
write 2nd byte
START
condition
STOP
condition
1st byte, slave address with R/W = 1
ACK of 1st byte
from slave
ACK of 2nd byte
from slave
bit7
bit0
bit7
bit0
read 2nd byte
Figure 19. I2C read and write signaling
10.1.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must
remain stable during the HIGH period of the clock pulse, as changes in the data line at
this time are interpreted as STOP or START conditions.
10.1.2 START and STOP conditions
A HIGH-to-LOW transition of the data line while the clock is HIGH is defined as the
START condition - S.
A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition - P (see Figure 19).
10.1.3 Acknowledge
Each byte of 8 bits is followed by an acknowledge cycle. An acknowledge is defined as
logic 0. A not-acknowledge is defined as logic 1.
When written to, the slave will generate an acknowledge after the reception of each byte.
After the acknowledge, another byte may be transmitted. It is also possible to send a
STOP or START condition.
When read from, the master receiver must generate an acknowledge after the reception
of each byte. When the master receiver no longer requires bytes to be transmitted, it
must generate a not-acknowledge. After the not-acknowledge, either a STOP or START
condition must be sent.
Remark: The PCA8561 omits the not-acknowledge. After the last byte read, the end of
transmission is indicated by a STOP or START condition from the master.
A detailed description of the I2C-bus specification is given in [5].
PCA8561
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 5 — 15 March 2021
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