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DA9220

High-Performance Dual-Channel DC-DC Converter

Datasheet

Revision 2.1

17-Sep-2020

CFR0011-120-00

28 of 62

4.2.3.3

Chip Configuration Select (CONF)

GPIO0 functions as chip configuration select (CONF) input when CONF_EN = 1.

Three different chip configurations can be selected according to the CONF pin level, whether it is

HIGH, LOW, or Hi-Z.

Table 18: GPIO0-Configurable Registers when CONF_EN = 1

Description

IF_SLAVE_ADDR[6:0]

I2C slave address

CH1_A_MODE[1:0]

CH1_A Operation mode select

CH1_B_MODE[1:0]

CH1_B Operation mode select

CH1_VSEL

CH1 output voltage and operation selection

CH1_EN

CH1 enable

CH1_A_VOUT[7:0]

CH1 output voltage setting A

CH1_B_VOUT[7:0]

CH1 output voltage setting B

CH2_A_MODE[1:0]

CH2_A Operation mode select

CH2_B_MODE[1:0]

CH2_B Operation mode select

CH2_VSEL

CH2 output voltage and operation selection

CH2_EN

CH2 enable

CH2_A_VOUT[7:0]

CH2 output voltage setting A

CH2_B_VOUT[7:0]

CH2 output voltage setting B

M_PG1_STAT

IRQ mask setting for CH1 power good status

M_PG2_STAT

IRQ mask setting for CH2 power good status

M_SG_STAT

IRQ mask setting for system good status

M_VR_HOT

IRQ mask setting for temp warning status

CH1_EN_DLY[3:0]

Delay setting for CH1 enable

CH1_DIS_DLY[3:0]

Delay setting for CH1 disable

CH2_EN_DLY[3:0]

Delay setting for CH2 enable

CH2_DIS_DLY[3:0]

Delay setting for CH2 disable

GPIO1_MODE[3:0]

GPIO1 mode setting

GPIO2_MODE[3:0]

GPIO2 mode setting

GPIO1_OBUF

GPIO1 output buffer select

GPIO2_OBUF

GPIO2 output buffer select

GPIO1_TRIG[1:0]

GPIO1 input trigger select

GPIO1_POL

GPIO1 polarity select

GPIO1_PUPD

GPIO1 pull-up/pull-down enable

GPIO1_DEB[1:0]

GPIO1 input debounce time setting

GPIO1_DEB_RISE

GPIO1 input debounce rising edge enable

GPIO1_DEB_FALL

GPIO1 input debounce falling edge enable

GPIO2_TRIG[1:0]

GPIO2 input trigger select

GPIO2_POL

GPIO2 polarity select

GPIO2_PUPD

GPIO2 pull-up/pull-down enable

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