M25P128-VMF6TP datasheet(23/41 Pages) STMICROELECTRONICS

номер детали	M25P128-VMF6TP

подробное описание детали	128 Mbit (Multilevel), Low Voltage, Serial Flash Memory With 50MHz SPI Bus Interface

PDF	41 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

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M25P128

Instructions

Rev. 1

23/41

6.6

Read Data Bytes (READ)

The device is first selected by driving Chip Select (S) Low. The instruction code for the Read

Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being

latched-in during the rising edge of Serial Clock (C). Then the memory contents, at that

address, is shifted out on Serial Data Output (Q), each bit being shifted out, at a maximum

frequency fR, during the falling edge of Serial Clock (C).

The instruction sequence is shown in Figure 13.

The first byte addressed can be at any location. The address is automatically incremented

to the next higher address after each byte of data is shifted out. The whole memory can,

therefore, be read with a single Read Data Bytes (READ) instruction. When the highest

address is reached, the address counter rolls over to 000000h, allowing the read sequence

to be continued indefinitely.

The Read Data Bytes (READ) instruction is terminated by driving Chip Select (S) High. Chip

Select (S) can be driven High at any time during data output. Any Read Data Bytes (READ)

instruction, while an Erase, Program or Write cycle is in progress, is rejected without having

any effects on the cycle that is in progress.

Figure 13. Read Data Bytes (READ) Instruction Sequence and Data-Out Sequence

AI03748D

3456789 10

28 29 30 31 32 33 34 35

22 21

3210

36 37 38

76543

High Impedance

Data Out 1

Instruction

24-Bit Address

MSB

Data Out 2

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