EDSTRG28PLCCCX datasheet(44/78 Pages) TI

44 / 78 page

GLOSSARY/SYMBOLS, TERMS, AND DEFINITIONS

1–36

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• HOUSTON, TEXAS 77251–1443

static RAM (SRAM):

A read/write random-access device within which information is stored as latched voltage lev-

els. The memory cell is a static latch that retains data as long as power is applied to the memory array. No refresh

is required. The type of periphery circuitry sub-categorizes static RAMs.

status register (ST):

A CPU register that monitors the operation of the instructions and contains the global-

interrupt-enable bits

symbolic debugging:

The ability of a software tool to retain symbolic information so that it can be used by a debug-

ging tool such as an XDS/22, a design kit, or a CDT370

symbol table:

A portion of a COFF file that contains information about the symbols that are defined and used by

the file

SYSCLK:

System Clock. This signal synchronizes external peripherals. It outputs one quarter of the crystal or

external oscillator frequency.

T1:

Timer 1 module contains a general-purpose timer and watchdog timer. Both timers allow program selection of

input-clock source (real time, external event, or pulse accumulate) with multiple registers (input capture and

compare) for special timer function control.

T2A:

Timer 2A module is composed of a 16-bit resettable counter, 16-bit compare register with associated compare

logic, a 16-bit capture register, and a 16-bit register that functions as a capture register in one mode and as a

compare register in the other mode.

T2B:

Timer 2B module is composed of a 16-bit resettable counter, 16-bit compare register with associated compare

logic, a 16-bit capture register, and a 16-bit register that functions as a capture register in one mode and as a

compare register in the other mode.

time slots:

The internal cycles in which the PACT module can make a 32-bit access to the dual-port RAM. Each

command or definition requires one, two, or three time slots. The number of time slots available is a function of

the PACT prescaled clock and the frequency of access to the dual-port RAM by the CPU.

unsigned integer:

A number system used to express positive integers

very-large-scale integration (VLSI):

The description of an IC technology that is much more complex than

large-scale integration (LSI) and involves a much higher equivalent gate count. At this time an exact definition

including a minimum gate count has not been standardized by JEDEC or the IEEE.

virtual timer:

An entry in the PACT command/definition area that creates an independent time base that is

incremented by the PACT prescaled clock and cleared upon reaching a maximum value that is set by this

definition.

volatile memory:

A memory in which the data content is lost when the power supply is disconnected

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