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ADF4372 датащи(PDF) 2 Page - Analog Devices |
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ADF4372 датащи(HTML) 2 Page - Analog Devices |
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2 / 47 page ![]() ADF4372 Data Sheet Rev. 0 | Page 2 of 47 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 6 Absolute Maximum Ratings............................................................ 8 Thermal Resistance ...................................................................... 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Typical Performance Characteristics ........................................... 11 Theory of Operation ...................................................................... 15 RF Synthesizer, a Worked Example.......................................... 15 Reference Input Sensitivity........................................................ 15 Reference Doubler and Reference Divider ............................. 16 Spurious Optimization and Fast Lock ..................................... 16 Optimizing Jitter......................................................................... 16 Spur Mechanisms ....................................................................... 16 Lock Time.................................................................................... 16 Circuit Description......................................................................... 18 Reference Input........................................................................... 18 RF N Divider............................................................................... 18 PFD and Charge Pump.............................................................. 19 MUXOUT and Lock Detect...................................................... 19 Double Buffers ............................................................................ 19 VCO ............................................................................................. 20 Output Stage................................................................................ 20 Doubler ........................................................................................ 21 Output Stage Mute ..................................................................... 21 SPI................................................................................................. 21 Device Setup.................................................................................... 22 Step 1: Set Up the SPI Interface ................................................ 22 Step 2: Initialization Sequence.................................................. 22 Step 3: Frequency Update Sequence ........................................ 22 Applications Information .............................................................. 23 Power Supplies ............................................................................ 23 PCB Design Guidelines for an LGA Package ......................... 23 Output Matching ........................................................................ 23 Register Summary .......................................................................... 24 Register Details ............................................................................... 26 Outline Dimensions ....................................................................... 47 Ordering Guide .......................................................................... 47 REVISION HISTORY 8/2019—Revision 0: Initial Version |
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