Serializer Switching Characteristics

Over recommended operating supply and temperature ranges unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

t

LLHT

LVDS Low-to-High Transition Time

R

Ω,

C

VODSEL = L

(Figure 3)

0.6

ns

t

LHLT

LVDS High-to-Low Transition Time

0.6

ns

t

DIS

DIN (0:23) Setup to TCLK

R

Ω,

C

(Note 8)

5ns

t

DIH

DIN (0:23) Hold from TCLK

5ns

t

HZD

R

Ω,

C

(Note 4) (Figure 7)

5ns

t

LZD

5

ns

t

ZHD

5

ns

t

ZLD

5

ns

t

PLD

Serializer PLL Lock Time (Figure 8)R

Ω

10

ms

t

SD

Serializer Delay (Figure 9)R

Ω

VODSEL = L, TRFB = H

3.5T + 2.85

ns

R

Ω

VODSEL = L, TRFB = L

3.5T + 2.85

ns

Deserializer Switching Characteristics

Over recommended operating supply and temperature ranges unless otherwise specified.

Symbol

Parameter

Conditions

Pin/Freq.

Min

Typ

Max Units

t

RCP

Receiver out Clock Period

(Note 8)

t

RCLK

28.6

200

ns

t

RDC

RCLK Duty Cycle

RCLK

45

50

55

%

t

CLH

CMOS/TTL Low-to-High

Transition Time

C

(lumped load)

(Figure 4)

ROUT [0:23],

LOCK, RCLK

2.5

3.5

ns

t

CHL

CMOS/TTL High-to-Low

Transition Time

2.5

3.5

ns

t

ROS

ROUT (0:7) Setup Data to

RCLK (Group 1)

(Figure 11)

ROUT [0:7]

(29/56)*t

RCP

(2/5)*

t

RCP

ns

t

ROH

ROUT (0:7) Hold Data to

RCLK (Group 1)

(Figure 11)

(27/56)*t

RCP

(2/5)*

t

RCP

ns

t

ROS

ROUT (8:15) Setup Data to

RCLK (Group 2)

(Figure 11)

ROUT [8:15],

LOCK

0.5*t

RCP

(2/5)*

t

RCP

ns

t

ROH

ROUT (9:15) Hold Data to

RCLK (Group 2)

(Figure 11)

0.5*t

RCP

(2/5)*

t

RCP

ns

t

ROS

ROUT (16:23) Setup Data to

RCLK (Group 3)

(Figure 11)

ROUT [16:23]

(27/56)*t

RCP

(2/5)*

t

RCP

ns

t

ROH

ROUT (16:23) Hold Data to

RCLK (Group 3)

(Figure 11)

(29/56)*t

RCP

(2/5)*

t

RCP

ns

t

HZR

HIGH to TRI-STATE Delay

(Figure 12)

ROUT [0:23],

RCLK, LOCK

310

ns

t

LZR

LOW to TRI-STATE Delay

3

10

ns

t

ZHR

TRI-STATE to HIGH Delay

3

10

ns

t

ZLR

TRI-STATE to LOW Delay

3

10

ns

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