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DS90C241 датащи(PDF) 3 Page - National Semiconductor (TI) |
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DS90C241 датащи(HTML) 3 Page - National Semiconductor (TI) |
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3 / 17 page ![]() Electrical Characteristics (Continued) Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter Conditions Pin/Freq. Min Typ Max Units LVDS DC SPECIFICATIONS V OD Output Differential Voltage (D OUT+)–(DOUT−) (Figure 16) R L = 100 Ω, w/o pre-emphasis VODSEL = L (VODSEL = H) D OUT+,DOUT− 250 (500) 400 (800) 600 (1200) mV ∆V OD Output Differential Voltage Unbalance R L = 100 Ω, w/o pre-emphasis 10 50 mV V OS Offset Voltage R L = 100 Ω, w/o pre-emphasis 1.05 1.2 1.25 V ∆V OS Offset Voltage Unbalance R L = 100 Ω, w/o pre-emphasis 10 50 mV I OS Output Short Circuit Current DOUT = 0V, DIN = H, TPWRDND = 2.4V −35 −50 −70 mA I OZ TRI-STATE Output Current TPWRDND = 0.8V, DOUT=0VorV DD −10 ±110 µA SER/DES SUPPLY CURRENT (DVDD*, PVDD* and AVDD* pins) *Digital, PLL, and Analog VDDs I CCT Serializer (Tx) Total Supply Current (includes load current) R L = 100 Ω Pre-emphasis = OFF Checker-board pattern VODSEL=L (Figure 1) f=35MHz 105 mA R L = 100 Ω RPRE=6k Ω Checker-board pattern VODSEL=L (Figure 1) f=35MHz 120 mA Serializer (Tx) Total Supply Current (includes load current) R L = 100 Ω R PRE = OFF Random pattern VODSEL=L f=35MHz 65 mA R L = 100 Ω R PRE =6k Ω Random pattern VODSEL=L f=35MHz 80 mA I CCTZ Serializer (Tx) Supply Current Power-down TPWRDNB = 0.8V 200 500 µA I CCR Deserializer (Rx) Total Supply Current (includes load current) C L =8pF Checker-board pattern LVTTL Output (Figure 2) f=35MHz 180 mA Deserializer (Rx) Total Supply Current (includes load current) C L =8pF Random pattern LVTTL Output f=35MHz 110 mA I CCRZ Deserializer (Rx) Supply Current Power-down RPWRDND = 0.8V 500 750 µA Serializer Timing Requirements for TCLK Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units t TCP Transmit Clock Period 28.6 T 200 ns t TCIH Transmit Clock High Time 0.4T 0.5T 0.6T ns t TCIL Transmit Clock Low Time 0.4T 0.5T 0.6T ns t CLKT TCLK Input Transition Time 36 ns t JIT TCLK Input Jitter (Note 9) ±200 ns www.national.com 3 |
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