TLE8082ES datasheet(30/61 Pages) INFINEON

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Table 20

Watchdog period configuration (all values are typical values) (continued)

Watchdog period tWD,per

Open window setting

Open window time tow

Closed window time tcw

tWD,per3 = 64 ms

short

tow3,s = 8 ms

56 ms

tWD,per3 = 64 ms

long

tow3,l = 16 ms

48 ms

tWD,per4 = 128 ms

short

tow4,s = 16 ms

112 ms

tWD,per4 = 128 ms

long

tow4,l = 30 ms

98 ms

6.2

Trigger of the watchdog - watchdog (WD) command

The watchdog trigger event is a rising edge at the pin CSN of an SPI communication frame with write access to

Note: All other SPI communications are not triggering the watchdog.

tWD,per

tcw

tow

CSN

tWD,per

tcw

tow

tWD,per

tcw

Restart of

WD Period

Restart of

WD Period

Figure 7

Watchdog trigger

6.3

Watchdog operation and error definition

The watchdog provides two functions to check the microcontroller:

timing check and

controlling of the functional check inside the microcontroller

A correct trigger of the watchdog is confirmed if the timing check and the control of the functional check

inside the microcontroller are passed. This leads to a decrement of the error counter. All other situations are

considered as watchdog errors and lead to an increment of the error counter. The watchdog status is indicated

by the bits EC, WDTO, WDCE and WDERR in the register WD.

Timing check:

The watchdog expects a watchdog command via SPI inside the open window. If the timing of the

microcontroller is too fast, the watchdog detects a watchdog command inside the closed window. In this

case, the watchdog command too early bit WDCE in register WD is set to 1. If the microcontroller timing is too

slow, the watchdog period is expired and the watchdog time out bit WDTO in register WD is set to 1.

Controlling of the internal functional check of the microcontroller:

The microcontroller transmits the status of the internal functional check by setting the watchdog check

command bit WDC in register WD. If the internal functional check of the microcontroller is not ok, the watchdog

error bit WDERR in register WD is set to 1.

TLE8082ES

Small engine management IC

Watchdog

Datasheet

Rev. 1.0

2021-03-23

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