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WM8774IFT датащи(PDF) 33 Page - Wolfson Microelectronics plc |
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WM8774IFT датащи(HTML) 33 Page - Wolfson Microelectronics plc |
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33 / 42 page ![]() Product Preview WM8774 PP Rev 1.0 June 2002 33 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 4:0 RAG[4:0] 01100 (0dB) Attenuation data for right channel ADC gain in 1dB steps 5 MUTE 0 Mute for Right channel ADC: 0: Mute off 1: Mute on 11010 Attenuation ADCR 6 LRBOTH 0 Setting LRBOTH will write the same gain value to RAG[4:0] and LAG[4:0] 2:0 LMX[2:0] 000 ADC left channel input mux control bits 6:4 RMX[2:0] 000 ADC right channel input mux control bits 11011 ADC mux control 8 AINPD 1 2:0 MX[2:0] 001 VOUT1 Output select (see Figure 18) 11100 Output mux and powerdown control 8:7 OUTPD 1 Mixer and EVR Powerdown select 0: mixer and EVR enabled 1: mixer and EVR powered down 11111 Software reset [8:0] RESET Not reset Writing to this register will apply a reset to the device registers. Table 14 Register Map Description |
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