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WM8774IFT датащи(PDF) 26 Page - Wolfson Microelectronics plc |
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WM8774IFT датащи(HTML) 26 Page - Wolfson Microelectronics plc |
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26 / 42 page ![]() WM8774 Product Preview PP Rev 1.0 June 2002 26 L/RDAX[7:0] ATTENUATION LEVEL 00(hex) - ∞ dB (mute) 01(hex) -127.5dB : : : : : : FE(hex) -0.5dB FF(hex) 0dB Table 11 Digital Volume Control Attenuation Levels The Digital volume control also incorporates a zero cross detect circuit which detects a transition through the zero point before updating the digital volume control with the new volume. This is enabled by control bit DZCEN. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 10011 DAC Control 0 DZCEN 0 DAC Digital Volume Zero Cross Enable: 0: Zero cross detect disabled 1: Zero cross detect enabled DAC OUTPUT PHASE The DAC Phase control word determines whether the output of each DAC is non-inverted or inverted REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION Bit DAC Phase 0 DACL 1 = invert 10010 DAC Phase 1:0 PH[1:0] 00 1 DACR 1 = invert ADC GAIN CONTROL Control bits LAG[4:0] and RAG[4:0] control the ADC input gain, allowing the user to attenuate the ADC input signal to match the full-scale range of the ADC. The gain is independently adjustable on left and right inputs. Left and right inputs may also be independently muted. The LRBOTH control bit allows the user to write the same attenuation value to both left and right volume control registers. The ADC volume and mute also applies to the bypass signal path. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 4:0 LAG[4:0] 01100 (0dB) Attenuation data for Left channel ADC gain in 1dB steps. See Table 12 5 MUTE 0 Mute for Left channel ADC: 0: Mute off 1: Mute on 11001 Attenuation ADCL 6 LRBOTH 0 Setting LRBOTH will write the same gain value to LAG[4:0] and RAG[4:0] 4:0 RAG[4:0] 01100 (0dB) Attenuation data for right channel ADC gain in 1dB steps. See Table 12 5 MUTE 0 Mute for Right channel ADC: 0: Mute off 1: Mute on 11010 Attenuation ADCR 6 LRBOTH 0 Setting LRBOTH will write the same gain value to RAG[4:0] and LAG[4:0] |
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