MAX17843 datasheet(102/131 Pages) MAXIM

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BIT

POR

NAME

DESCRIPTION

D15

ALRTOSC1

Indicates that the 32kHz oscillator frequency is not within ±5% of its expected value. The

status is updated every two cycles (32kHz). Cleared only by writing to logic-zero. Writing to

a logic-one has no effect.

D14

ALRTOSC2

Same as ALRTOSC1 (redundant alert). Cleared only by writing to logic-zero. Writing to a

logic-one has no effect.

D13

Always reads logic-zero.

D12

ALRTCOMMSEU1

Indicates that the UART has placed the upper-port receiver in single-ended mode based on

the first preamble received after POR. This bit is not set until the ALRTRST bit is cleared.

Read-only.

D11

ALRTCOMMSEL1

Indicates that the UART has placed the lower-port receiver in single-ended mode based on

the first preamble received after POR. This bit is not set until the ALRTRST bit is cleared.

Read-only.

D10

ALRTCOMMSEU2

Same as ALRTCOMMSEU1 (redundant alert) except that it sets before ALRTRST is

cleared. Read-only.

ALRTCOMMSEL2

Same as ALRTCOMMSEL2 (redundant alert) except that it sets before ALRTRST is

cleared. Read-only.

ALRTVDDL3

Indicates VDDL3 < VVDDL_OC. This bit is not set until the ALRTRST bit is cleared, and

cleared only by writing to logic-zero. Writing to a logic-one has no effect.

ALRTVDDL2

Indicates VDDL2 < VVDDL_OC. This bit is not set until the ALRTRST bit is cleared, and

cleared only by writing to logic-zero. Writing to a logic-one has no effect.

ALRTGNDL2

Indicates an open circuit on the GNDL2 pin. This bit is not set until the ALRTRST bit is

cleared, and cleared only by writing to logic-zero. Writing to a logic-one has no effect.

ALRTBALSW

Bit-wise logical OR of ALRTBALSW[15:0]. Cleared automatically if the fault is cleared, or by

writing it to logic-zero.

ALRTTEMP

Indicates that TDIE > 115°C (120°C typ) or that the diagnostic measurement did not have

sufficient settling time (< 50µs) and therefore may not be accurate. Cleared only by writing

to logic-zero. Writing to a logic-one has no effect.

ALRTHVUV

Indicates VHV < VHVUV. This bit is not set until the ALRTRST bit is cleared, and cleared

only by writing to logic-zero. Writing to logic-one has no effect.

ALRTGNDL3

Indicates an open circuit on the GNDL3 pin. This bit is not set until the ALRTRST bit is

cleared, and cleared only by writing to logic-zero. Writing to a logic-one has no effect.

ALRTVDDL1

Indicates VDDL1 < VVDDL_OC. This bit is not set until the ALRTRST bit is cleared and

cleared only by writing to logic-zero. Writing to a logic-one has no effect.

ALRTGNDL1

Indicates an open circuit on the GNDL1 pin. This bit is not set until the ALRTRST bit is

cleared, and cleared only by writing to logic-zero. Writing to a logic-one has no effect.

MAX17843

12-Channel, High-Voltage Smart Sensor

Data-Acquisition Interface

www.maximintegrated.com

Maxim Integrated │ 102

FMEA1 Register (address 0x03)

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