TMP47P201 datasheet(20/32 Pages) TOSHIBA

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TOSHIBA CORPORATION

TMP47C101/201

3. Peripheral Hardware Function

3.1 Ports

The data transfer with the external circuit and the command/

status/data transfer with the internal circuit are performed by

using the I/O instructions (13 kinds). There are 4 types of ports:

I/O port

;

Data transfer with external cir-

cuit

Command register ;

Control of internal circuit

Status register

;

Reading the status signal from

internal circuit

Data register

;

Data transfer with internal cir-

cuit

These ports are assigned with port addresses (00H

through IFH). Each port is selected by specifying its port ad-

dress in an I/O instruction. Table 3-1 lists the port address as-

signments and the I/O instructions that can access the ports.

3.1.1 I/O Timing

(1)

Input timing

External data is read from an input port or an I/O port

in the S3 state of the second instruction cycle during

the input instruction (2-cycle instruction) execution.

This timing cannot be recognized from the outside, so

that the transient input such as chattering must be

processed by program.

Figure 3-1. Input Timing

(2)

Output timing

Data is output to an output port or an I/O port in the S4

state of the second instruction cycle during the output

instruction (2-cycle instruction) execution.

Figure 3-2. Output Timing

3.1.2 I/O Ports

The 47C101/201 have 4 I/O ports (11 pins) each as follows:

R4, R5

;

4-bit input/output

;

2-bit input/output (shared with

external interrupt input and

timer/counter input)

;

1-bit sense input (shared with

hold request/release signal in-

put)

Each output port contains a latch, which holds the out-

put data. The input ports have no latch; therefore, it is

desired to hold data externally until it is read or read

twice or more before processing it.

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