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STPMIC1APQR датащи(PDF) 114 Page - STMicroelectronics

номер детали STPMIC1APQR
подробное описание детали  Highly integrated power management IC for micro processor units
PDF  140 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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STPMIC1APQR датащи(HTML) 114 Page - STMicroelectronics

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6.6.2
NVM control register (NVM_CR)
Table 63. NVM_CR
7
6
5
4
3
2
1
0
reserved
reserved
reserved
reserved
reserved
reserved
NVM_CMD[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address: 0xB9
Type: read/write register
Default: 0x00
Description: NVM control register
[7 :2] reserved
[1:0]
NVM_CMD[1:0]: NVM controller command bits to control NVM operation on NVM shadow register bits.
00: No operation
01: Program (write shadow register to NVM)
10: Read (load NVM content into shadow registers)
11: No operation
STPMIC1
NVM registers
DS12792 - Rev 7
page 114/140



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