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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LTC4230IGN датащи(PDF) 15 Page - Linear Technology |
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LTC4230IGN датащи(HTML) 15 Page - Linear Technology |
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15 / 36 page  15 LTC4230 4230f Ensuring a proper start-up sequence is also dependent on selecting the most appropriate value for CTIMER for the application. Long timing periods affect overall system start-up times. A timing period set too short and the system may never start up. A good starting point is to set CTIMER = 1µF and then adjust its value accordingly for the application. OPERATING SEQUENCE Power-Up, Start-Up Check and Plug-In Timing Cycle The sequence of operations for the LTC4230 is illustrated in the timing diagram of Figure 5. When a PC board is first inserted into a live backplane, the LTC4230 first performs 1 3 6 7 4 5 FIRST TIMING CYCLE 20 µA PULL-UP 20 µA PULL-UP 4230 F05 NORMAL MODE SECOND TIMING CYCLE CHECK FOR FILTER LOW (< VREF) CHECK FOR FAULT HIGH (> VREF + 50mV) 2 CHECK FOR GATE n < 0.2V FAST COMPARATOR ARMED IF ON IS LOW AND VFBn < 1.234V, RESET 1, RESET 2 AND RESET 3 PULL LOW, RESPECTIVELY ON TIMER GATE n VOUTn RESET 1 RESET 2, RESET 3 10 µA PULL-UP 200 µA PULL-DOWN SLOW COMPARATOR ARMED 8 9 POWER GOOD (VFBn > 1.237V) POWER BAD (VFBn < 1.234V) 200 µA PULL-DOWN Figure 5. Normal Power-Up Sequence Table 1. tTIMER vs CTIMER CTIMER tTIMER 0.1 µF 6.2ms 0.22 µF 13.6ms 0.33 µF 20.4ms 0.47 µF 29ms 0.68 µF 42ms 0.82 µF 50.6ms 1 µF 61.7ms 2.2 µF 136ms 3.3 µF 204ms 4.7 µF 290ms 6.8 µF 420ms 8.2 µF 506ms 10 µF 617ms APPLICATIO S I FOR ATIO |
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