LTC4230IGN datasheet(10/36 Pages) LINER

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LTC4230

4230f

SENSE 2 (Pin 17): Circuit Breaker Sense Pin for Chan-

nel 2. With a sense resistor placed in the power path

between VCC2 and SENSE 2, Channel 2’s electronic circuit

breaker trips if the voltage across the sense resistor (VCC2

– VSENSE2) exceeds the thresholds set internally for SLOW

COMP2 and FAST COMP2, as shown in the Block Diagram.

The threshold for SLOW COMP2 is VCB(SLOW) = 50mV and

the electronic circuit breaker trips if the voltage across

RSENSE2 exceeds 50mV for 10µs, or for the time delay

programmed by CFILTER. To adjust SLOW COMP2’s delay,

please refer to the section on Adjusting SLOW COMP

n’s

Response Time.

Under transient conditions where large step current

changes can and do occur over shorter periods of time, a

second (fast) comparator instead trips the electronic

circuit breaker. The threshold for FAST COMP2 is set at

VCB(FAST) = 150mV, and the circuit breaker trips if the

voltage across the RSENSE2 exceeds 150mV for more than

500ns. FAST COMP2’s delay is fixed in the LTC4230 and

cannot be adjusted. To disable Channel 2’s electronic

circuit breaker, connect the VCC2 and SENSE 2 pins

together.

GATE 2 (Pin 18): The output signal at this pin is the high

side gate drive for Channel 2’s external N-channel FET

pass transistor. An internal charge pump produces a 4.5V

(minimum) to 18V (maximum) gate drive voltage for VCC1

supply voltages from 2.7V to 16.5V, respectively.

As shown in the Block Diagram for each channel, an

internal charge pump supplies a 10

µA gate current and

sufficient gate voltage drive to the external FET. The

internal charge pump produces a minimum 4.5V gate

drive for VCC1 < 4.75V. For VCC1 > 4.75V, the minimum

gate voltage drive is 9V. For VCC1 ≥ 12V, the minimum gate

voltage drive is 7V which is set by an internal zener diode

clamp connected between the GATE 2 pin and GND.

RESET 2 (Pin 19): An open-drain N-channel device whose

source connects to GND (Pin 14). This pin pulls low if the

voltage at FB2 (Pin 20) falls below the FB2 threshold

(1.234V). This pin requires an external pull-up resistor to

VOUT2. If an undervoltage lockout condition occurs, the

RESET 2 pin pulls low independently of FB2 to prevent

false glitches.

FB2 (Pin 20): The FB2 (Feedback) pin is an input to the

FBCOMP2 comparator which monitors the VCC2 output

supply voltage through an external resistor divider. If VFB2

< 1.234V, RESET 2 pulls low. An internal glitch filter at

FBCOMP3’s output prevents triggering a reset condition

due to negative voltage transients. If VFB2 > 1.237V,

RESET 2 pin goes high after exiting undervoltage lockout.

PI FU CTIO S

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