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AGLP030 датащи(PDF) 122 Page - Actel Corporation

номер детали AGLP030
подробное описание детали  IGLOO PLUS Low Power Flash FPGAs with Flash*Freeze Technology
PDF  128 Pages
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производитель  ACTEL [Actel Corporation]
домашняя страница  http://www.actel.com
Logo ACTEL - Actel Corporation

AGLP030 датащи(HTML) 122 Page - Actel Corporation

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Datasheet Information
4- 2
R ev isio n 1 1
Revision 11 (continued) The values in the following tables were updated. 3.3 V LVCMOS and 1.2 V
LVCMOS wide range were added to the tables where applicable.
Table 2-13 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software
Settings
Table 2-14 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software
Settings1
Table 2-21 • Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Commercial and Industrial Conditions—Software Default Settings
Table 2-22 • Summary of Maximum and Minimum DC Input Levels
Table 2-23 • Summary of AC Measuring Points
Table 2-25 • Summary of I/O Timing Characteristics—Software Default Settings,
STD Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC =
1.425 V, Worst-Case VCCI = 3.0 V
Table 2-26 • Summary of I/O Timing Characteristics—Software Default Settings,
STD Speed Grade Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC =
1.14 V, Worst-Case VCCI = 3.0 V
Table 2-28 • I/O Output Buffer Maximum Resistances 1
2-9
2-9
2-19
2-20
2-21
2-22
2-23
2-24
A table note was added to Table 2-16 • Different Components Contributing to the
Static Power Consumption in IGLOO PLUS Devices and Table 2-18 • Different
Components Contributing to the Static Power Consumption in IGLOO PLUS
Devices stating the value for PDC4 is the minimum contribution of the PLL when
operating at lowest frequency.
2-11,
2-12
Table 2-29 • I/O Weak Pull-Up/Pull-Down Resistances was revised, including
addition of 3.3 V and 1.2 V LVCMOS wide range. The notes defining RWEAK PULL-
UP-MAX and RWEAK PULLDOWN-MAX were revised (SAR 21348).
2-25
Table 2-30 • I/O Short Currents IOSH/IOSL was revised to include data for 3.3 V
and 1.2 V LVCMOS wide range (SAR 79353 and SAR 79366).
2-25
Table 2-31 • Duration of Short Circuit Event before Failure was revised to change
the maximum temperature from 110°C to 100°C, with an example of six months
instead of three months (SAR 26259).
2-26
The tables in the "Single-Ended I/O Characteristics" section were updated. Notes
clarifying IIL and IIH were added.
Tables for 3.3 V LVCMOS and 1.2 V LVCMOS wide range were added (SAR
79370,
SAR 79353, and SAR 79366).
Notes in the wide range tables state that the minimum drive strength for any
LVCMOS 3.3 V (or LVCMOS 1.2 V) software configuration when run in wide
range is ±100 µA. Drive strength displayed in the software is supported for
normal range only. For a detailed I/V curve, refer to the IBIS models (SAR
25700).
2-27
The following sentence was deleted from the "2.5 V LVCMOS" section: It uses a
5 V–tolerant input buffer and push-pull output buffer (SAR 24916).
2-32
The tables in the "Input Register" section, "Output Register" section, and "Output
Enable Register" section were updated. The tables in the
"VersaTile
Characteristics" section were updated.
2-45
through
2-56
Revision
Changes
Page



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