AGLP030 datasheet(82/128 Pages) ACTEL

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IGLOO PLUS DC and Switching Characteristics

2- 68

R e v i sio n 1 1

Timing Characteristics

1.5 V DC Core Voltage

Table 2-92 • RAM4K9

Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V

Parameter

Description

Std. Units

tAS

Address setup time

0.69

tAH

Address hold time

0.13

tENS

REN_B, WEN_B setup time

0.68

tENH

REN_B, WEN_B hold time

0.13

tBKS

BLK_B setup time

1.37

tBKH

BLK_B hold time

0.13

tDS

Input data (DI) setup time

0.59

tDH

Input data (DI) hold time

0.30

tCKQ1

Clock High to new data valid on DO (output retained, WMODE = 0)

2.94

Clock High to new data valid on DO (flow-through, WMODE = 1)

2.55

tCKQ2

Clock High to new data valid on DO (pipelined)

1.51

tC2CWWL

Address collision clk-to-clk delay for reliable write after write on same address – applicable

to closing edge

0.29

tC2CRWH

Address collision clk-to-clk delay for reliable read access after write on same address –

applicable to opening edge

0.24

tC2CWRH

Address collision clk-to-clk delay for reliable write access after read on same address –

applicable to opening edge

0.40

tRSTBQ

RESET_B Low to data out Low on DO (flow-through)

1.72

RESET_B Low to data out Low on DO (pipelined)

1.72

tREMRSTB

RESET_B removal

0.51

tRECRSTB

RESET_B recovery

2.68

tMPWRSTB

RESET_B minimum pulse width

0.68

tCYC

Clock cycle time

6.24

FMAX

Maximum frequency

160

MHz

Note:

For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.

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