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AD9082 датащи(PDF) 20 Page - Analog Devices

номер детали AD9082
подробное описание детали  MxFE Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC
PDF  33 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9082 датащи(HTML) 20 Page - Analog Devices

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AD9082
Data Sheet
Rev. A | Page 20 of 33
Pin No.
Mnemonic
Type
Description
F18, F17
SERDOUT5+,
SERDOUT5−
Output
JTx Lane 5 Outputs, Data True/Complement.
D18, D17
SERDOUT6+,
SERDOUT6−
Output
JTx Lane 6 Outputs, Data True/Complement.
B18, B17
SERDOUT7+,
SERDOUT7−
Output
JTx Lane 7 Outputs, Data True/Complement.
B13, A13
SYNC0INB+,
SYNC0INB−
Input
JTx Link 0 Synchronization Inputs for JESD204B
interface. These pins are LVDS or CMOS
configurable. These pins are LVDS or CMOS
configurable and have selectable internal 100 Ω
input impedance for LVDS operation
B12, A12
SYNC1INB+,
SYNC1INB−
Input
JTx Link 1 Synchronization Inputs for JESD204B
interface or CMOS Inputs for Receive FFH via
GPIOx pins. These pins are LVDS or CMOS
configurable and have selectable internal 100 Ω
input impedance for LVDS operation.
T4, T3
SYSREFP, SYSREFN
Input
Active High JESD204 System Reference Inputs.
These pins are configurable for differential
current mode logic (CML), PECL, and LVDS with
internal 100 Ω termination or single-ended
CMOS.
NO CONNECTS AND DO NOT CONNECTS
A5, A6, V5, V6
NC
No Connect. These pins can be left open or
connected.
B7, H4, L4, L15, L16, U7
DNC
DNC
Do Not Connect. The pins must be kept open.
1
CMOS inputs do not have pull-up or pull-down resistors.
2
SERDINx± and SERDOUTx± include 100 Ω internal termination resistors.



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